Commit Graph

55 Commits

Author SHA1 Message Date
Andrew Tridgell d422825715 HAL_ChibiOS: removed per-board AP_FEATURE_RTSCTS and AP_FEATURE_SBUS_OUT
not needed any more
2019-12-18 17:18:44 +11:00
Andrew Tridgell 0751756e91 HAL_ChibiOS: retain OPENDRAIN if set on a pin
this allows OPENDRAIN when set on a pin to be retained when set with a
pinMode(). This fixes a partially lit B/E LED on the Pixhawk4
2019-11-17 11:45:38 +11:00
Andrew Tridgell e820219202 HAL_ChibiOS: changed optimisation of higher end boards to -O2
-O3 does not seem to be a win, and takes up a lot more flash
2019-09-28 08:57:26 +10:00
Andrew Tridgell 2c5c8106a5 HAL_ChibiOS: removed duplicate barometer from fmuv5 2019-09-04 21:24:01 +10:00
Andrew Tridgell 72494788f7 HAL_ChibiOS: convert more boards to use BARO specifier 2019-08-28 06:54:11 +10:00
Stone white ec911710c9 hwdef: Enable Spektrum 3.3V VDD Power on fmuv5 2019-08-26 17:27:02 +10:00
Andrew Tridgell adcf9c4fa4 HAL_ChibiOS: added commented out baro on SPI5 for fmuv5
useful for SPI debugging
2019-07-29 10:09:08 +10:00
Andrew Tridgell 98f578394f HAL_ChibiOS: default OTG2 protocol to mavlink2 on most boards
For boards that haven't yet had a driver update in MissionPlanner to
cope with the 2nd OTG interface this change makes both interfaces work
as MAVLink

This also fixes an issue with connecting under a windows VM within
vmware
2019-07-26 21:58:57 +10:00
bugobliterator cba98096e9 HAL_ChibiOS: move to using hardcoded heater PWM polarity in iofirmware 2019-07-25 17:05:41 +10:00
Andrew Tridgell e57228646e HAL_ChibiOS: added unused CS pins for fmuv5
these are needed to ensure SPI works correctly if the unused pins are
later attached to a device
2019-07-19 16:58:10 +10:00
Andrew Tridgell 1919268801 HAL_ChibiOS: added OTG2 on all F7 and H7 boards with CAN
allows for SLCAN on 2nd port
2019-07-12 17:01:21 +10:00
Andrew Tridgell d90b05f685 HAL_ChibiOS: convert all fmuv5 boards to sensor config system 2019-05-30 15:39:57 +10:00
Andrew Tridgell 2b0a30a2c5 HAL_ChibiOS: ensure we don't overflow bootloader area
this modifies the ld script to use the maximum size available for the
bootloader, so we can't accidentially grow the bootloader beyond its
max size
2019-05-06 12:36:41 +10:00
Andrew Tridgell 4deb2c38f6 HAL_ChibiOS: fixed brick2 valid status in POWR flags for fmuv5
and fixed sense of VBUS
2019-05-03 10:32:41 +10:00
Andrew Tridgell 312597ac20 HAL_ChibiOS: fixed default batt2 pins for fmuv5 2019-02-26 16:18:26 +11:00
Andrew Tridgell 34a7812416 HAL_ChibiOS: use -O3 on boards with 2M flash 2019-02-26 16:18:26 +11:00
Andrew Tridgell 18e97bd895 HAL_ChibiOS: fixed CAN on Pixhawk4 and PH4-mini
the silent pins floating disabled CAN
2019-01-23 13:24:13 +11:00
Andrew Tridgell 17d62be9bb HAL_ChibiOS: disable USART6_TX on fmuv5
this prevents it acting as a pullup on SBUS input for Pixhawk4. Thanks
to David Sidrane for the suggestion.
2019-01-18 10:24:27 +11:00
Andrew Tridgell 4886ccd8ba HAL_ChibiOS: fixed safety switch and LEDs on PH4-mini
fixes #10127
2018-12-29 15:50:00 +11:00
auturgy 575d03796c AP_HAL_ChibiOS: fix typo in fmuv5 hwdef [NFC]
header comment fixed from fmuv3 to fmuv5
2018-11-09 18:58:27 +09:00
Lucas De Marchi 20778f73f1 AP_HAL_ChibiOS: define HAL_HAVE_SAFETY_SWITCH accordingly 2018-08-02 13:15:02 -07:00
Andrew Tridgell 95aaa01014 HAL_ChibiOS: override COMPASS_AUTO_ROT on several boards 2018-07-28 18:05:12 +10:00
Andrew Tridgell 63a0a4979c HAL_ChibiOS: delay peripheral power on for fmuv5
this should prevent SiK radios staying in the bootloader
2018-07-13 07:34:30 +10:00
Andrew Tridgell b647dde28f HAL_ChibiOS: changed which I2C bus is internal on fmuv5
match PH4 arrangement
2018-07-10 18:29:14 +10:00
Andrew Tridgell 63a9b903ba HAL_ChibiOS: added fallback to microSD for param storage
useful for boards without flash sectors setup in bootloader for
storage, but can use microSD
2018-07-10 15:41:44 +10:00
Andrew Tridgell dd059b89f3 HAL_ChibiOS: added uartG for fmuv4 and fmuv5 2018-06-29 08:17:38 +10:00
Andrew Tridgell 54dc67e2a9 HAL_ChibiOS: default bootloader product string to XX-BL 2018-06-28 11:35:13 +10:00
Andrew Tridgell d183efa720 HAL_ChibiOS: fixed USB string of fmuv5 bootloader 2018-06-28 11:35:13 +10:00
Andrew Tridgell f71d2a7417 HAL_ChibiOS: support bootloaders with no uarts 2018-06-25 21:22:31 +10:00
Andrew Tridgell d88b710ea9 HAL_ChibiOS: added more bootloader hwdef-bl.dat files 2018-06-22 08:00:31 +10:00
Andrew Tridgell 1c054f0e4a HAL_ChibiOS: fixed clock line on fmuv5 I2C4
there was a typo in the datasheet
2018-06-21 13:08:20 +10:00
Andrew Tridgell 10ca1e78e8 HAL_ChibiOS: switched to Mode3 on SPI1
this is now working correctly
2018-06-13 20:05:26 +10:00
Andrew Tridgell 9d248456e4 HAL_ChibiOS: re-enable I2C4 DMA for F765
now we have fixed the error from the datasheet we can do DMA
2018-06-13 20:05:26 +10:00
Andrew Tridgell e068106669 HAL_ChibiOS: support I2C devices on STM32F7 without DMA
this allows us to support I2C4 on fmuv5
2018-06-13 20:05:26 +10:00
Andrew Tridgell ab946b5d76 HAL_ChibiOS: disable debug code for FMUv5 2018-06-08 09:56:41 +10:00
Andrew Tridgell 3a7c1b4d42 HAL_ChibiOS: switch BMI055 to mode0 on fmuv5 2018-06-08 09:56:41 +10:00
Andrew Tridgell 3be9077ba9 HAL_ChibiOS: added FMUv5 FMU capture pins 2018-06-06 15:01:38 +10:00
Andrew Tridgell 63087b6425 HAL_ChibiOS: enable fmu out 7 and 8 for fmuv5
these are exposed on the Pixhawk4
2018-06-06 15:01:38 +10:00
Andrew Tridgell c273b23940 HAL_ChibiOS: moved MCU config to python database
this moves the key MCU config variables related to memory to the
python MCU database, allowing the hwdef.dat to be considerably simpler
2018-06-06 07:15:41 +10:00
Andrew Tridgell a1c97d0585 HAL_ChibiOS: disable paranoid checks for fmuv5 2018-06-06 07:15:41 +10:00
Andrew Tridgell 2493cdbcb6 HAL_ChibiOS: switch to new bouncebuffer system
this removes the dma_flush and dma_invalidate methods and uses a
common bouncebuffer system for all CPU types. This enables microSD
support on STM32F7
2018-06-06 07:15:41 +10:00
Andrew Tridgell 56ce3f057d HAL_ChibiOS: added DRDY and SDMMC pins for FMUv5 2018-06-06 07:15:41 +10:00
Andrew Tridgell eec4a12cc2 HAL_ChibiOS: switched to using DTCM memory for DMA
this uses SRAM1 and SRAM2 for main memory, which enables the use of the
data cache for faster operation, and using DTCM for all DMA operations.
2018-06-06 07:15:41 +10:00
Andrew Tridgell 010cd71ab6 HAL_ChibiOS: enable CAN on FMUv5
and fixed voltage scaling defaults
2018-06-06 07:15:41 +10:00
Andrew Tridgell 77d95f6744 HAL_ChibiOS: fmuv5 tweaks 2018-06-06 07:15:41 +10:00
Andrew Tridgell edb831653f HAL_ChibiOS: added dma_flush and dma_invalidate operations
these are needed to manage the data cache on the STM32F7
2018-06-06 07:15:41 +10:00
Andrew Tridgell 7449e15313 HAL_ChibiOS: disable flash storage option on FMUv5
F7 flash driver not working yet
2018-06-06 07:15:41 +10:00
Andrew Tridgell 2d8748ddce HAL_ChibiOS: enable ADCs and buzzer for fmuv5 2018-06-06 07:15:41 +10:00
Andrew Tridgell 6aab9232ef HAL_ChibiOS: enable aux pwm channels on FMUv5 2018-06-06 07:15:41 +10:00
Andrew Tridgell db9bf19e46 HAL_ChibiOS: enable i2c for FMUv5 2018-06-06 07:15:41 +10:00