HAL_ChibiOS: fmuv5 tweaks

This commit is contained in:
Andrew Tridgell 2018-05-30 18:26:52 +10:00
parent a220220758
commit 77d95f6744
1 changed files with 20 additions and 13 deletions

View File

@ -60,20 +60,20 @@ PE2 SPI4_SCK SPI4
PE13 SPI4_MISO SPI4
PE6 SPI4_MOSI SPI4
# SPI5 - external1
PF7 SPI5_SCK SPI5
PF8 SPI5_MISO SPI5
PF9 SPI5_MOSI SPI5
# SPI5 - external1 (disabled to save DMA channels)
# PF7 SPI5_SCK SPI5
# PF8 SPI5_MISO SPI5
# PF9 SPI5_MOSI SPI5
# SPI6 - external2
PG13 SPI6_SCK SPI6
PG12 SPI6_MISO SPI6
PB5 SPI6_MOSI SPI6
# SPI6 - external2 (disabled to save DMA channels)
# PG13 SPI6_SCK SPI6
# PG12 SPI6_MISO SPI6
# PB5 SPI6_MOSI SPI6
# sensor CS
PF10 MS5611_CS CS
PF2 ICM20689_CS CS
PF3 ICM20602_CS CS
PF2 ICM20689_CS CS SPEED_VERYLOW
PF3 ICM20602_CS CS SPEED_VERYLOW
PF4 BMI055_G_CS CS
PG10 BMI055_A_CS CS
PF5 FRAM_CS CS SPEED_VERYLOW
@ -198,12 +198,19 @@ PB10 nSPI5_RESET_EXTERNAL1 OUTPUT HIGH
# SPI devices
SPIDEV ms5611 SPI4 DEVID1 MS5611_CS MODE3 20*MHZ 20*MHZ
SPIDEV icm20689 SPI1 DEVID1 ICM20689_CS MODE0 1*MHZ 8*MHZ
SPIDEV icm20602 SPI1 DEVID2 ICM20602_CS MODE0 1*MHZ 8*MHZ
SPIDEV icm20689 SPI1 DEVID1 ICM20689_CS MODE0 2*MHZ 8*MHZ
SPIDEV icm20602 SPI1 DEVID2 ICM20602_CS MODE0 2*MHZ 8*MHZ
SPIDEV bmi055_g SPI1 DEVID3 BMI055_G_CS MODE3 8*MHZ 8*MHZ
SPIDEV bmi055_a SPI1 DEVID4 BMI055_A_CS MODE3 8*MHZ 8*MHZ
SPIDEV ramtron SPI2 DEVID1 FRAM_CS MODE3 8*MHZ 8*MHZ
# microSD support
#PC8 SDMMC_D0 SDMMC1
#PC9 SDMMC_D1 SDMMC1
#PC10 SDMMC_D2 SDMMC1
#PC11 SDMMC_D3 SDMMC1
#PC12 SDMMC_CK SDMMC1
# enable RAMTROM parameter storage
define HAL_STORAGE_SIZE 16384
define HAL_WITH_RAMTRON 1
@ -214,7 +221,7 @@ define HAL_BARO_DEFAULT HAL_BARO_MS5611_SPI
define HAL_COMPASS_DEFAULT HAL_COMPASS_NONE
DMA_PRIORITY UART8* TIM* SPI*
DMA_PRIORITY UART8* ADC* SPI* TIM*
define CH_DBG_ENABLE_ASSERTS TRUE
define CH_DBG_ENABLE_CHECKS TRUE