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1343 Commits

Author SHA1 Message Date
bugobliterator 7b9f0f3fd7 HAL_ChibiOS: use FIFO mode instead of Queue mode in FDCAN driver 2020-05-21 15:32:53 +10:00
Henry Wurzburg 12d5602926 AP_HAL_ChibiOS: Add ability to use UART3 and UART4 in bd alt config 4 2020-05-11 14:18:35 +10:00
Peter Barker 50523ed0fa AP_HAL_ChibiOS: remove pointless initialisations 
These are never stack-allocated.

Only saves 16 bytes - but several lines
 2020-05-10 18:03:36 +10:00
Andrew Tridgell 2200dfefdb HAL_ChibiOS: during setup() we expect delays 
this may fix occasional internal errors on SPI during startup
 2020-05-10 15:12:43 +10:00
Andrew Tridgell 259cb0aafd HAL_ChibiOS: removed EKF2 define, not needed any more 2020-05-10 15:09:54 +10:00
Andrew Tridgell 61d036acf3 HAL_ChibiOS: added build time check for right system clock 
this helps prevent cases where we underclock a chip due to mistake in
headers or hwdef.dat
 2020-05-10 15:09:28 +10:00
Andrew Tridgell 69676cd614 HAL_ChibiOS: support 24MHz f3 MCUs 2020-05-10 15:09:28 +10:00
Henry Wurzburg 3f735e7e54 HAL_ChibiOS: Make full UART4 available as bd config option 2020-05-10 08:00:57 +10:00
Henry Wurzburg 225a305cb9 AP_HAL_ChibiOS:Remove alt config since its not useful (no TX available) 2020-05-10 08:00:21 +10:00
Peter Barker 967f8bf726 AP_HAL_ChibiOS: correct description of where stdout goes 2020-05-05 07:57:57 +10:00
Andrew Tridgell e126b6d346 HAL_ChibiOS: fixed race condition in storage write 
we could mark a line as clean when it should be dirty if we lose a
race condition between storage thread and writer
 2020-05-04 17:22:41 +10:00
Peter Barker 48da4e523c AP_HAL_ChibiOS: create and use INTERNAL_ERROR macro so we get line numbers 2020-04-30 13:21:36 +10:00
pkocmoud defb7dc43f hwdef: add mRo M10070 Location One CAN GPS 2020-04-30 11:31:43 +10:00
Andrew Tridgell 3ec2ef787d HAL_ChibiOS: fixed build warning 2020-04-29 12:20:19 +10:00
Andrew Tridgell ce68e0fbb5 HAL_ChibiOS: fixed bootloader build 2020-04-29 07:36:55 +10:00
Andrew Tridgell 0ef66659ce HAL_ChibiOS: log WDOG message once a second 
this copes with delayed mounting of the microSD, making it much more
likely we log the critical data
 2020-04-29 07:36:55 +10:00
Andrew Tridgell 18e88e0ea3 HAL_ChibiOS: implement stack overflow hook 
this needs C bindings to allow call from low level RTOS thread
switching code
 2020-04-29 07:36:55 +10:00
Andrew Tridgell c61cecdbc7 HAL_ChibiOS: report thread name in watchdog 2020-04-29 07:36:55 +10:00
Andrew Tridgell 09477b2dfe HAL_ChibiOS: shorted thread names 
changes names so threads can be distinguished by first 4 bytes
 2020-04-29 07:36:55 +10:00
Andrew Tridgell a5965d5a9e HAL_Chibios: removed unnecessary debug defines 2020-04-29 07:36:55 +10:00
Andrew Tridgell 2c26807736 HAL_ChibiOS: embed hwdef.dat in ROMFS for all boards 2020-04-29 07:36:55 +10:00
Andrew Tridgell 9350c78023 AP_HAL_ChibiOS: use GCS_SEND_TEXT() 2020-04-29 07:36:55 +10:00
Andrew Tridgell 6bacf021c8 HAL_ChibiOS: disable thread_info in AP_Periph and bootloader 2020-04-29 07:36:55 +10:00
Andrew Tridgell d82cd1363b HAL_ChibiOS: fixed bootloader build 2020-04-29 07:36:55 +10:00
Andrew Tridgell f0c9f4003e HAL_ChibiOS: implement thread_info() 2020-04-29 07:36:55 +10:00
Andrew Tridgell ea71b72c87 HAL_ChibiOS: fixed issue with I2C4 on H743 
when both I2C4 and SPI4 are active on a H743 I found that some BDMA
completion interrupts were lost, which resulted in SPI transfer
timeouts. Close inspection of the ChibiOS BDMA, I2Cv3 and SPIv3
drivers did not reveal any issues, but I found that the issue only
happened when the first 4 BDMA streams were used. This change splits
the 4 streams across the first and 2nd half of the BDMA controller,
and that fixes the problem.

This works as there are only 2 peripherals (I2C4 and SPI6) that want
to use BDMA with our current setup. If we ever wish to enable ADC3
(which also uses BDMA) we will need to revisit this issue
 2020-04-28 17:42:15 +10:00
Andrew Tridgell 32cdfddf12 HAL_ChibiOS: convert all hwdef from UART_ORDER to SERIAL_ORDER 
much easier to understand
 2020-04-28 10:32:23 +10:00
Andrew Tridgell a52070d226 HAL_ChibiOS: use SERIAL_ORDER instead of UART_ORDER 
SERIAL_ORDER is much easier for developers to understand as it maps
directly to the SERIALn_ parameters
 2020-04-28 10:32:23 +10:00
Andrew Tridgell 0994655f5b HAL_ChibiOS: fixed build warnings for bootloader builds 2020-04-28 10:32:23 +10:00
Andrew Tridgell 9557a5c22c HAL_ChibiOS: added more STM32CubeMX configs 2020-04-28 10:32:23 +10:00
Andrew Tridgell a9df9fe0c0 HAL_ChibiOS: removed clock tree settings in most hwdef.dat 
these are better set automatically in the headers. This simplifies the
task of doing a new port
 2020-04-28 10:32:23 +10:00
Andrew Tridgell a638196334 HAL_ChibiOS: skyviper-f412-rev1 uses a custom clock tree 2020-04-28 10:32:23 +10:00
Andrew Tridgell e8b2b52bae HAL_ChibiOS: removed STM32_VDD from hwdef.dat 
use default
 2020-04-28 10:32:23 +10:00
Andrew Tridgell d9efac2993 HAL_ChibiOS: only allow PLL override in clock selection part of header 2020-04-28 10:32:23 +10:00
Andrew Tridgell fe765b8845 HAL_ChibiOS: switched CUAV_GPS to use same clocks as other F4 2020-04-28 10:32:23 +10:00
Andrew Tridgell 82c45f6cdb HAL_ChibiOS: default STM32_VDD to 3.3V 2020-04-28 10:32:23 +10:00
Andrew Tridgell 29f538dec9 HAL_ChibiOS: use common header for STM32 clock config 
avoid the need for clock config lines in most hwdef.dat files
 2020-04-28 10:32:23 +10:00
Andrew Tridgell 3d5475a1d9 HAL_ChibiOS: fixed skyviper-journey build 2020-04-28 10:32:23 +10:00
Andrew Tridgell 7320cd3174 HAL_ChibiOS: fixed assert in wait_pin() 2020-04-27 14:01:04 +10:00
Ivannikov Kirill 3ab1b29397 AP_HAL_ChibiOS: error if system clock not 1mhz on 16 CH_CFG_ST_RESOLUTION. prevent variable overflow 
if CH_CFG_ST_FREQUENCY not match 1000000U on 16 bit CH_CFG_ST_RESOLUTION
we try to multiply now *= 1000000U/CH_CFG_ST_FREQUENCY; it may overflow 16 bit value.
 2020-04-26 19:58:54 +10:00
Andrew Tridgell d9e2a644ea HAL_ChibiOS: fixed Durandal buzzer in bootloader 
need to pull low to avoid buzzer running in bootloader
 2020-04-24 19:46:22 +10:00
bugobliterator b94f089984 HAL_ChibiOS: improve throughput of slcan router 2020-04-24 19:39:18 +10:00
Andrew Tridgell 43ac58c63b HAL_ChibiOS: added STM32CubeMX configs for H7 processor crystal varients 
useful for checking clock config changes
 2020-04-24 16:55:03 +10:00
Andrew Tridgell db642717be HAL_ChibiOS: fixed clock for FDCAN to be below 80MHz 
we were running at 100MHz, which is out of spec
 2020-04-24 16:55:03 +10:00
Andrew Tridgell 2c68ce1986 HAL_ChibiOS: fixed clock source for FDCAN 
use selected source and add 80MHz limit, as per manual and latest STM32CubeMX tool
 2020-04-24 16:55:03 +10:00
Andrew Tridgell 4ec1717361 HAL_ChibiOS: enable IMU temp control on CUAV-X7 2020-04-23 09:05:52 +10:00
Andrew Tridgell 56b0dddb7c HAL_ChibiOS: set IMU temp on CUAV-X7 2020-04-23 07:28:13 +10:00
Andrew Tridgell 5892e6421e HAL_ChibiOS: enable DRDY on ADIS16470 on CUAV-X7 2020-04-23 07:28:13 +10:00
Andrew Tridgell ffe773ff6f HAL_ChibiOS: use DRDY pin for ADIS16470 on mRoNexus 2020-04-23 07:28:13 +10:00
Andrew Tridgell 450871cde1 HAL_ChibiOS: added wait_pin() implementation 2020-04-23 07:28:13 +10:00