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HAL_ChibiOS: fixed clock source for FDCAN 

use selected source and add 80MHz limit, as per manual and latest STM32CubeMX tool
This commit is contained in:
Andrew Tridgell 2020-04-24 09:31:20 +10:00
parent 864717310d
commit 2c68ce1986
1 changed files with 4 additions and 1 deletions
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5
libraries/AP_HAL_ChibiOS/CANFDIface.cpp
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@ -69,6 +69,8 @@
extern const AP_HAL::HAL& hal;
static_assert(STM32_FDCANCLK <= 80U*1000U*1000U, "FDCAN clock must be max 80MHz");
namespace ChibiOS_CAN
{
namespace
@ -200,7 +202,8 @@ int CanIface::computeTimings(const uavcan::uint32_t target_bitrate, Timings& out
/*
* Hardware configuration
*/
const uavcan::uint32_t pclk = STM32_PLL1_Q_CK;
const uavcan::uint32_t pclk = STM32_FDCANCLK;
static const int MaxBS1 = 16;
static const int MaxBS2 = 8;