62 Commits

Author	SHA1	Message	Date
Andrew Tridgell	010cd71ab6	HAL_ChibiOS: enable CAN on FMUv5 ... and fixed voltage scaling defaults	2018-06-06 07:15:41 +10:00
Andrew Tridgell	77d95f6744	HAL_ChibiOS: fmuv5 tweaks	2018-06-06 07:15:41 +10:00
Andrew Tridgell	edb831653f	HAL_ChibiOS: added dma_flush and dma_invalidate operations ... these are needed to manage the data cache on the STM32F7	2018-06-06 07:15:41 +10:00
Andrew Tridgell	7449e15313	HAL_ChibiOS: disable flash storage option on FMUv5 ... F7 flash driver not working yet	2018-06-06 07:15:41 +10:00
Andrew Tridgell	2d8748ddce	HAL_ChibiOS: enable ADCs and buzzer for fmuv5	2018-06-06 07:15:41 +10:00
Andrew Tridgell	6aab9232ef	HAL_ChibiOS: enable aux pwm channels on FMUv5	2018-06-06 07:15:41 +10:00
Andrew Tridgell	db9bf19e46	HAL_ChibiOS: enable i2c for FMUv5	2018-06-06 07:15:41 +10:00
Andrew Tridgell	77bb69fa2e	HAL_ChibiOS: enabled UARTs for FMUv5	2018-06-06 07:15:41 +10:00
Andrew Tridgell	ac44189ab2	HAL_ChibiOS: setup two IMUs for FMUv5	2018-06-06 07:15:41 +10:00
Andrew Tridgell	01f5d1a17c	HAL_ChibiOS: first IMU working	2018-06-06 07:15:41 +10:00
Andrew Tridgell	876899c48d	HAL_ChibiOS: baro and FRAM working for fmuv5	2018-06-06 07:15:41 +10:00
Andrew Tridgell	7c09a1781b	HAL_ChibiOS: started on fmuv5	2018-06-06 07:15:41 +10:00