HAL_ChibiOS: enabled UARTs for FMUv5

This commit is contained in:
Andrew Tridgell 2018-05-30 08:12:17 +10:00
parent ac44189ab2
commit 77bb69fa2e

View File

@ -31,7 +31,7 @@ STM32_VDD 330U
FLASH_SIZE_KB 2048
# order of UARTs (and USB)
UART_ORDER OTG1
UART_ORDER OTG1 USART1 USART2 USART3 UART4 USART6
# now we define the pins that USB is connected on
PA11 OTG_FS_DM OTG1
@ -82,13 +82,47 @@ PG5 VDD_5V_RC_EN OUTPUT HIGH
PG6 VDD_5V_WIFI_EN OUTPUT HIGH
PG7 VDD_3V3_SD_CARD_EN OUTPUT HIGH
# now the 2nd GPS UART
# UART8 serial4 GPS2
#PE0 UART8_RX UART8
#PE1 UART8_TX UART8
# UARTs
# USART2 is telem1
PD6 USART2_RX USART2
PD5 USART2_TX USART2
PD3 USART2_CTS USART2
PD4 USART2_RTS USART2
# USART1 is GPS1
PB7 USART1_RX USART1 NODMA
PB6 USART1_TX USART1 NODMA
# USART3 is telem2
PD9 USART3_RX USART3
PD8 USART3_TX USART3
PD11 USART3_CTS USART3
PD12 USART3_RTS USART3
# UART4 GPS2
PD0 UART4_RX UART4 NODMA
PD1 UART4_TX UART4 NODMA
# USART6 is telem3
PG9 USART6_RX USART6 NODMA
PG14 USART6_TX USART6 NODMA
PG15 USART6_CTS USART6
PG8 USART6_RTS USART6
# UART7 is debug
PF6 UART7_RX UART7 NODMA
PE8 UART7_TX UART7 NODMA
# UART8 is for IOMCU
PE0 UART8_RX UART8
PE1 UART8_TX UART8
# UART for IOMCU
#IOMCU_UART UART8
IOMCU_UART UART8
# enable RTSCTS support
define AP_FEATURE_RTSCTS 1
# enable SBUS_OUT on IOMCU (if you have an IOMCU)
define AP_FEATURE_SBUS_OUT 1
@ -110,6 +144,8 @@ define HAL_BARO_DEFAULT HAL_BARO_MS5611_SPI
define HAL_COMPASS_DEFAULT HAL_COMPASS_NONE
DMA_PRIORITY UART8* TIM* SPI*
define CH_DBG_ENABLE_ASSERTS TRUE
define CH_DBG_ENABLE_CHECKS TRUE
define CH_DBG_SYSTEM_STATE_CHECK TRUE