10 Commits

Author	SHA1	Message	Date
Andrew Tridgell	318c0a958d	HAL_ChibiOS: removed PB1 and PB0 TIM1 complementary channels for F76x ... these do not work, possibly a datasheet bug	2019-12-23 19:42:04 +11:00
Andrew Tridgell	62c3fec45c	HAL_ChibiOS: fixes from LGTM errors	2019-09-22 21:07:54 +10:00
Andrew Tridgell	e92c66418d	HAL_ChibiOS: fixed bouncebuffer code on STM32F7	2019-02-26 16:18:26 +11:00
Andrew Tridgell	cda1959629	HAL_ChibiOS: added support for more flexible memory regions ... this allows for an arbitrary number of memory regions, with each one flagged as DMA safe, fast or normal	2019-02-26 16:18:26 +11:00
Andrew Tridgell	a6ab885866	HAL_ChibiOS: fixed typo in F767 pin def file	2018-11-20 18:28:11 +11:00
Andrew Tridgell	1c054f0e4a	HAL_ChibiOS: fixed clock line on fmuv5 I2C4 ... there was a typo in the datasheet	2018-06-21 13:08:20 +10:00
Andrew Tridgell	ad3eca4e6b	HAL_ChibiOS: fixed I2C4 DMA streams ... There is an error in the datasheet. See https://community.st.com/thread/50484-documentation-error-on-dma-channels-for-i2c4-on-stm32f7	2018-06-13 20:05:26 +10:00
Andrew Tridgell	c273b23940	HAL_ChibiOS: moved MCU config to python database ... this moves the key MCU config variables related to memory to the python MCU database, allowing the hwdef.dat to be considerably simpler	2018-06-06 07:15:41 +10:00
Andrew Tridgell	8d2f57898b	HAL_ChibiOS: adjust pin counts for STM32F7	2018-06-06 07:15:41 +10:00
mirkix	8074361bb8	AP_HAL_ChibiOS: add hardware def for STM32F767xx	2018-04-12 14:19:40 +10:00