2018-01-05 02:19:51 -04:00
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/*
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* This file is free software: you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program. If not, see <http://www.gnu.org/licenses/>.
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2019-10-20 10:31:12 -03:00
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*
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2018-01-05 02:19:51 -04:00
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* Code by Andrew Tridgell and Siddharth Bharat Purohit
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*/
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#pragma once
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#include <AP_HAL/utility/RingBuffer.h>
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#include "AP_HAL_ChibiOS.h"
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#include "shared_dma.h"
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2018-03-06 18:41:03 -04:00
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#include "Semaphores.h"
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2018-01-05 02:19:51 -04:00
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2019-12-20 23:39:01 -04:00
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#define RX_BOUNCE_BUFSIZE 64U
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2018-06-26 21:50:57 -03:00
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#define TX_BOUNCE_BUFSIZE 64U
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2018-01-05 02:19:51 -04:00
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2023-12-11 00:55:15 -04:00
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// enough for serial0 to serial9, plus IOMCU
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2021-11-05 00:17:39 -03:00
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#define UART_MAX_DRIVERS 11
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2018-02-05 22:40:30 -04:00
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2018-01-13 00:02:05 -04:00
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class ChibiOS::UARTDriver : public AP_HAL::UARTDriver {
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2018-01-05 02:19:51 -04:00
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public:
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2018-01-13 00:02:05 -04:00
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UARTDriver(uint8_t serial_num);
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2018-01-05 02:19:51 -04:00
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2020-12-05 15:16:27 -04:00
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/* Do not allow copies */
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2022-09-30 06:50:43 -03:00
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CLASS_NO_COPY(UARTDriver);
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2020-12-05 15:16:27 -04:00
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2018-11-07 06:58:46 -04:00
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bool is_initialized() override;
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bool tx_pending() override;
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2021-07-10 15:16:24 -03:00
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uint32_t get_usb_baud() const override;
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2018-01-05 02:19:51 -04:00
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2021-11-05 01:33:57 -03:00
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// disable TX/RX pins for unusued uart
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void disable_rxtx(void) const override;
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2018-01-05 02:19:51 -04:00
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uint32_t txspace() override;
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2020-12-05 15:16:27 -04:00
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void _rx_timer_tick(void);
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void _tx_timer_tick(void);
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2023-01-19 20:17:23 -04:00
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#if HAL_FORWARD_OTG2_SERIAL
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void fwd_otg2_serial(void);
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#endif
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2018-01-05 02:19:51 -04:00
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2018-11-10 05:45:31 -04:00
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// control optional features
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2020-01-02 21:50:42 -04:00
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bool set_options(uint16_t options) override;
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2021-11-28 05:44:36 -04:00
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uint16_t get_options(void) const override;
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2019-10-20 10:31:12 -03:00
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2018-01-05 02:19:51 -04:00
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struct SerialDef {
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BaseSequentialStream* serial;
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2020-10-27 22:01:14 -03:00
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uint8_t instance;
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2018-01-05 02:19:51 -04:00
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bool is_usb;
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2019-05-26 22:45:30 -03:00
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#ifndef HAL_UART_NODMA
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2018-01-05 02:19:51 -04:00
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bool dma_rx;
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uint8_t dma_rx_stream_id;
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2018-01-10 17:50:25 -04:00
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uint32_t dma_rx_channel_id;
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2018-01-05 02:19:51 -04:00
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bool dma_tx;
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uint8_t dma_tx_stream_id;
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2019-05-26 22:45:30 -03:00
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uint32_t dma_tx_channel_id;
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#endif
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2019-12-02 18:56:05 -04:00
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ioline_t tx_line;
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ioline_t rx_line;
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2018-01-10 17:50:25 -04:00
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ioline_t rts_line;
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2021-02-10 18:11:44 -04:00
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ioline_t cts_line;
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2018-11-10 05:45:31 -04:00
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int8_t rxinv_gpio;
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uint8_t rxinv_polarity;
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int8_t txinv_gpio;
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uint8_t txinv_polarity;
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2021-07-10 15:16:24 -03:00
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uint8_t endpoint_id;
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2024-04-30 13:57:29 -03:00
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uint8_t rts_alternative_function;
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2018-01-10 17:50:25 -04:00
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uint8_t get_index(void) const {
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return uint8_t(this - &_serial_tab[0]);
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}
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2018-01-05 02:19:51 -04:00
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};
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bool wait_timeout(uint16_t n, uint32_t timeout_ms) override;
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2018-01-10 17:50:25 -04:00
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void set_flow_control(enum flow_control flow_control) override;
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enum flow_control get_flow_control(void) override { return _flow_control; }
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2018-01-21 16:28:29 -04:00
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// allow for low latency writes
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bool set_unbuffered_writes(bool on) override;
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2018-01-21 18:31:22 -04:00
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void configure_parity(uint8_t v) override;
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void set_stop_bits(int n) override;
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2018-05-15 21:42:31 -03:00
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2021-07-08 03:35:58 -03:00
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/*
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software control of the CTS/RTS pins if available. Return false if
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not available
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*/
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bool set_RTS_pin(bool high) override;
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bool set_CTS_pin(bool high) override;
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2018-05-15 21:42:31 -03:00
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/*
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return timestamp estimate in microseconds for when the start of
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a nbytes packet arrived on the uart. This should be treated as a
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time constraint, not an exact time. It is guaranteed that the
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packet did not start being received after this time, but it
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could have been in a system buffer before the returned time.
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This takes account of the baudrate of the link. For transports
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that have no baudrate (such as USB) the time estimate may be
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less accurate.
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A return value of zero means the HAL does not support this API
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*/
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2018-05-16 18:01:14 -03:00
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uint64_t receive_time_constraint_us(uint16_t nbytes) override;
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2018-04-05 22:58:52 -03:00
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2023-01-18 03:45:42 -04:00
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uint32_t bw_in_bytes_per_second() const override {
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2018-04-05 22:58:52 -03:00
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if (sdef.is_usb) {
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return 200*1024;
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2018-04-05 22:58:52 -03:00
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}
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2023-01-18 03:45:42 -04:00
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return _baudrate/10;
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2018-04-05 22:58:52 -03:00
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}
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2021-06-05 00:51:10 -03:00
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2022-12-14 16:33:07 -04:00
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uint32_t get_baud_rate() const override { return _baudrate; }
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2022-01-08 06:56:52 -04:00
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#if HAL_UART_STATS_ENABLED
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// request information on uart I/O for one uart
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2024-03-15 11:20:43 -03:00
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void uart_info(ExpandingString &str, StatsTracker &stats, const uint32_t dt_ms) override;
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2022-01-08 06:56:52 -04:00
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#endif
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2018-04-05 22:58:52 -03:00
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2021-05-01 09:00:59 -03:00
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/*
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return true if this UART has DMA enabled on both RX and TX
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*/
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bool is_dma_enabled() const override { return rx_dma_enabled && tx_dma_enabled; }
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2018-01-05 02:19:51 -04:00
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private:
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2018-01-10 17:50:25 -04:00
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const SerialDef &sdef;
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2019-12-20 23:39:01 -04:00
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bool rx_dma_enabled;
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bool tx_dma_enabled;
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2018-02-05 22:40:30 -04:00
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2020-10-27 22:01:14 -03:00
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/*
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2021-09-23 15:05:18 -03:00
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copy of rx_line, tx_line, rts_line and cts_line with alternative configs resolved
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2020-10-27 22:01:14 -03:00
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*/
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ioline_t atx_line;
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ioline_t arx_line;
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2021-09-23 15:05:18 -03:00
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ioline_t arts_line;
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ioline_t acts_line;
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2020-12-05 15:16:27 -04:00
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2018-02-05 22:40:30 -04:00
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// thread used for all UARTs
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2020-12-05 15:16:27 -04:00
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static thread_t* volatile uart_rx_thread_ctx;
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2018-02-05 22:40:30 -04:00
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// table to find UARTDrivers from serial number, used for event handling
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2023-12-11 00:55:15 -04:00
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static UARTDriver *serial_drivers[UART_MAX_DRIVERS];
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2020-12-05 15:16:27 -04:00
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// thread used for writing and reading
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thread_t* volatile uart_thread_ctx;
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char uart_thread_name[6];
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2018-02-05 22:40:30 -04:00
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2023-12-11 00:55:15 -04:00
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// index into serial_drivers table
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2018-02-05 22:40:30 -04:00
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uint8_t serial_num;
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2018-04-02 03:00:36 -03:00
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2018-01-05 02:19:51 -04:00
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uint32_t _baudrate;
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2018-03-01 20:46:30 -04:00
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#if HAL_USE_SERIAL == TRUE
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2018-01-05 02:19:51 -04:00
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SerialConfig sercfg;
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2018-03-01 20:46:30 -04:00
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#endif
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2018-01-05 02:19:51 -04:00
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const thread_t* _uart_owner_thd;
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struct {
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// thread waiting for data
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thread_t *thread_ctx;
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// number of bytes needed
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uint16_t n;
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} _wait;
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// we use in-task ring buffers to reduce the system call cost
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// of ::read() and ::write() in the main loop
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2019-05-26 22:45:30 -03:00
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#ifndef HAL_UART_NODMA
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2019-12-20 23:39:01 -04:00
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volatile uint8_t rx_bounce_idx;
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uint8_t *rx_bounce_buf[2];
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2018-05-31 22:18:37 -03:00
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uint8_t *tx_bounce_buf;
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2020-06-16 05:28:40 -03:00
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uint16_t contention_counter;
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2019-05-26 22:45:30 -03:00
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#endif
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2018-01-05 02:19:51 -04:00
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ByteBuffer _readbuf{0};
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ByteBuffer _writebuf{0};
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2020-01-18 17:57:24 -04:00
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HAL_Semaphore _write_mutex;
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2019-05-26 22:45:30 -03:00
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#ifndef HAL_UART_NODMA
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2018-01-05 02:19:51 -04:00
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const stm32_dma_stream_t* rxdma;
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const stm32_dma_stream_t* txdma;
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2019-05-26 22:45:30 -03:00
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#endif
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2020-12-05 15:16:27 -04:00
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volatile bool _in_rx_timer;
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volatile bool _in_tx_timer;
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volatile bool _rx_initialised;
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volatile bool _tx_initialised;
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volatile bool _device_initialised;
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2019-05-26 22:45:30 -03:00
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#ifndef HAL_UART_NODMA
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2018-01-05 02:19:51 -04:00
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Shared_DMA *dma_handle;
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2019-05-26 22:45:30 -03:00
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#endif
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2018-01-10 17:50:25 -04:00
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static const SerialDef _serial_tab[];
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2018-05-15 21:42:31 -03:00
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// timestamp for receiving data on the UART, avoiding a lock
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uint64_t _receive_timestamp[2];
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uint8_t _receive_timestamp_idx;
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2018-01-10 17:50:25 -04:00
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// handling of flow control
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enum flow_control _flow_control = FLOW_CONTROL_DISABLE;
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bool _rts_is_active;
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uint32_t _last_write_completed_us;
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uint32_t _first_write_started_us;
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2018-07-12 07:48:37 -03:00
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uint32_t _total_written;
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2018-11-14 00:55:14 -04:00
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2020-12-05 15:16:27 -04:00
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// statistics
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uint32_t _tx_stats_bytes;
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uint32_t _rx_stats_bytes;
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2019-12-27 03:27:11 -04:00
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// we remember config options from set_options to apply on sdStart()
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uint32_t _cr1_options;
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2018-11-14 00:55:14 -04:00
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uint32_t _cr2_options;
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2019-12-27 03:27:11 -04:00
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uint32_t _cr3_options;
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2020-01-02 21:50:42 -04:00
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uint16_t _last_options;
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2018-11-14 00:55:14 -04:00
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2018-12-19 07:25:41 -04:00
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// half duplex control. After writing we throw away bytes for 4 byte widths to
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// prevent reading our own bytes back
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2019-12-27 03:27:11 -04:00
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#if CH_CFG_USE_EVENTS == TRUE
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2018-12-19 07:25:41 -04:00
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bool half_duplex;
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2019-12-27 03:27:11 -04:00
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event_listener_t hd_listener;
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2021-01-31 12:13:34 -04:00
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eventflags_t hd_tx_active;
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2019-12-27 03:27:11 -04:00
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void half_duplex_setup_tx(void);
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#endif
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2018-12-19 07:25:41 -04:00
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2018-01-21 16:28:29 -04:00
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// set to true for unbuffered writes (low latency writes)
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bool unbuffered_writes;
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2019-08-27 04:42:51 -03:00
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#if CH_CFG_USE_EVENTS == TRUE
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// listener for parity error events
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event_listener_t ev_listener;
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bool parity_enabled;
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#endif
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2019-10-20 10:31:12 -03:00
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2019-05-26 22:45:30 -03:00
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#ifndef HAL_UART_NODMA
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2018-01-05 02:19:51 -04:00
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static void rx_irq_cb(void* sd);
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2019-05-26 22:45:30 -03:00
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#endif
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2018-01-05 02:19:51 -04:00
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static void rxbuff_full_irq(void* self, uint32_t flags);
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static void tx_complete(void* self, uint32_t flags);
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2019-05-26 22:45:30 -03:00
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#ifndef HAL_UART_NODMA
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2018-03-14 03:06:30 -03:00
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void dma_tx_allocate(Shared_DMA *ctx);
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void dma_tx_deallocate(Shared_DMA *ctx);
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2019-12-20 02:23:09 -04:00
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void dma_rx_enable(void);
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2019-05-26 22:45:30 -03:00
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#endif
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2018-01-10 17:50:25 -04:00
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void update_rts_line(void);
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2018-01-21 16:28:29 -04:00
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2018-03-14 05:51:04 -03:00
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void check_dma_tx_completion(void);
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2019-05-26 22:45:30 -03:00
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#ifndef HAL_UART_NODMA
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2018-01-21 16:28:29 -04:00
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void write_pending_bytes_DMA(uint32_t n);
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2019-05-26 22:45:30 -03:00
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#endif
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2018-01-21 16:28:29 -04:00
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void write_pending_bytes_NODMA(uint32_t n);
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void write_pending_bytes(void);
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2020-12-05 15:16:27 -04:00
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void read_bytes_NODMA();
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2018-02-05 22:40:30 -04:00
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2018-05-15 21:42:31 -03:00
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void receive_timestamp_update(void);
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2019-10-20 10:31:12 -03:00
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2020-01-02 21:50:42 -04:00
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// set SERIALn_OPTIONS for pullup/pulldown
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void set_pushpull(uint16_t options);
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2020-12-05 15:16:27 -04:00
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static void thread_rx_init();
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2018-02-05 22:40:30 -04:00
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void thread_init();
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2020-12-05 15:16:27 -04:00
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void uart_thread();
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static void uart_rx_thread(void* arg);
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static void uart_thread_trampoline(void* p);
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2023-07-09 17:56:59 -03:00
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protected:
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void _begin(uint32_t b, uint16_t rxS, uint16_t txS) override;
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void _end() override;
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void _flush() override;
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size_t _write(const uint8_t *buffer, size_t size) override;
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ssize_t _read(uint8_t *buffer, uint16_t count) override;
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uint32_t _available() override;
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bool _discard_input() override;
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2024-04-06 13:07:19 -03:00
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#if HAL_UART_STATS_ENABLED
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// Getters for cumulative tx and rx counts
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uint32_t get_total_tx_bytes() const override { return _tx_stats_bytes; }
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uint32_t get_total_rx_bytes() const override { return _rx_stats_bytes; }
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#endif
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2018-01-05 02:19:51 -04:00
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};
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2020-02-11 18:50:18 -04:00
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// access to usb init for stdio.cpp
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void usb_initialise(void);
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