mirror of
https://github.com/ArduPilot/ardupilot
synced 2025-02-04 23:18:29 -04:00
HAL_Chibios: added hardware flow control for UARTs
implement RTS in software and CTS in hardware
This commit is contained in:
Andrew Tridgell
parent
9916a93919
commit
41be81af34
@ -57,6 +57,9 @@ static struct gpio_entry *gpio_by_pin_num(uint8_t pin_num)
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{
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for (uint8_t i=0; i<ARRAY_SIZE(_gpio_tab); i++) {
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if (pin_num == _gpio_tab[i].pin_num) {
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if (!_gpio_tab[i].enabled) {
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return NULL;
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}
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return &_gpio_tab[i];
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}
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}
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@ -31,7 +31,7 @@ using namespace ChibiOS;
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#define HAVE_USB_SERIAL
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#endif
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static ChibiUARTDriver::SerialDef _serial_tab[] = {
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const ChibiUARTDriver::SerialDef ChibiUARTDriver::_serial_tab[] = {
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#if CONFIG_HAL_BOARD_SUBTYPE == HAL_BOARD_SUBTYPE_CHIBIOS_FMUV3
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{(BaseSequentialStream*) &SDU1, true, false, 0, 0, false, 0, 0}, //Serial 0, USB
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UART4_CONFIG, // Serial 1, GPS
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@ -61,16 +61,11 @@ static ChibiUARTDriver::SerialDef _serial_tab[] = {
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ChibiUARTDriver::ChibiUARTDriver(uint8_t serial_num) :
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tx_bounce_buf_ready(true),
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_serial_num(serial_num),
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sdef(_serial_tab[serial_num]),
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_baudrate(57600),
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_is_usb(false),
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_in_timer(false),
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_initialised(false)
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{
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_serial = _serial_tab[serial_num].serial;
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_is_usb = _serial_tab[serial_num].is_usb;
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_dma_rx = _serial_tab[serial_num].dma_rx;
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_dma_tx = _serial_tab[serial_num].dma_tx;
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chMtxObjectInit(&_write_mutex);
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}
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@ -78,7 +73,7 @@ void ChibiUARTDriver::begin(uint32_t b, uint16_t rxS, uint16_t txS)
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{
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hal.gpio->pinMode(2, HAL_GPIO_OUTPUT);
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hal.gpio->pinMode(3, HAL_GPIO_OUTPUT);
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if (_serial == nullptr) {
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if (sdef.serial == nullptr) {
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return;
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}
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bool was_initialised = _initialised;
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@ -125,14 +120,14 @@ void ChibiUARTDriver::begin(uint32_t b, uint16_t rxS, uint16_t txS)
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_writebuf.set_size(txS);
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}
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if (_is_usb) {
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if (sdef.is_usb) {
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#ifdef HAVE_USB_SERIAL
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/*
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* Initializes a serial-over-USB CDC driver.
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*/
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if (!was_initialised) {
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sduObjectInit((SerialUSBDriver*)_serial);
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sduStart((SerialUSBDriver*)_serial, &serusbcfg);
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sduObjectInit((SerialUSBDriver*)sdef.serial);
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sduStart((SerialUSBDriver*)sdef.serial, &serusbcfg);
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/*
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* Activates the USB driver and then the USB bus pull-up on D+.
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* Note, a delay is inserted in order to not have to disconnect the cable
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@ -148,35 +143,35 @@ void ChibiUARTDriver::begin(uint32_t b, uint16_t rxS, uint16_t txS)
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if (_baudrate != 0) {
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//setup Rx DMA
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if(!was_initialised) {
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if(_dma_rx) {
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rxdma = STM32_DMA_STREAM(_serial_tab[_serial_num].dma_rx_stream_id);
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if(sdef.dma_rx) {
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rxdma = STM32_DMA_STREAM(sdef.dma_rx_stream_id);
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bool dma_allocated = dmaStreamAllocate(rxdma,
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12, //IRQ Priority
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(stm32_dmaisr_t)rxbuff_full_irq,
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(void *)this);
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osalDbgAssert(!dma_allocated, "stream already allocated");
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dmaStreamSetPeripheral(rxdma, &((SerialDriver*)_serial)->usart->DR);
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dmaStreamSetPeripheral(rxdma, &((SerialDriver*)sdef.serial)->usart->DR);
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}
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if (_dma_tx) {
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if (sdef.dma_tx) {
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// we only allow for sharing of the TX DMA channel, not the RX
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// DMA channel, as the RX side is active all the time, so
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// cannot be shared
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dma_handle = new Shared_DMA(_serial_tab[_serial_num].dma_tx_stream_id,
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dma_handle = new Shared_DMA(sdef.dma_tx_stream_id,
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SHARED_DMA_NONE,
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FUNCTOR_BIND_MEMBER(&ChibiUARTDriver::dma_tx_allocate, void),
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FUNCTOR_BIND_MEMBER(&ChibiUARTDriver::dma_tx_deallocate, void));
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}
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}
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sercfg.speed = _baudrate;
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if (!_dma_tx && !_dma_rx) {
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if (!sdef.dma_tx && !sdef.dma_rx) {
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sercfg.cr1 = 0;
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sercfg.cr3 = 0;
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} else {
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if (_dma_rx) {
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if (sdef.dma_rx) {
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sercfg.cr1 = USART_CR1_IDLEIE;
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sercfg.cr3 = USART_CR3_DMAR;
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}
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if (_dma_tx) {
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if (sdef.dma_tx) {
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sercfg.cr3 |= USART_CR3_DMAT;
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}
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}
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@ -184,16 +179,16 @@ void ChibiUARTDriver::begin(uint32_t b, uint16_t rxS, uint16_t txS)
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sercfg.irq_cb = rx_irq_cb;
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sercfg.ctx = (void*)this;
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sdStart((SerialDriver*)_serial, &sercfg);
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if(_dma_rx) {
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sdStart((SerialDriver*)sdef.serial, &sercfg);
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if(sdef.dma_rx) {
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//Configure serial driver to skip handling RX packets
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//because we will handle them via DMA
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((SerialDriver*)_serial)->usart->CR1 &= ~USART_CR1_RXNEIE;
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((SerialDriver*)sdef.serial)->usart->CR1 &= ~USART_CR1_RXNEIE;
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//Start DMA
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if(!was_initialised) {
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uint32_t dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
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dmamode |= STM32_DMA_CR_CHSEL(STM32_DMA_GETCHANNEL(_serial_tab[_serial_num].dma_rx_stream_id,
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_serial_tab[_serial_num].dma_rx_channel_id));
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dmamode |= STM32_DMA_CR_CHSEL(STM32_DMA_GETCHANNEL(sdef.dma_rx_stream_id,
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sdef.dma_rx_channel_id));
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dmamode |= STM32_DMA_CR_PL(0);
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dmaStreamSetMemory0(rxdma, rx_bounce_buf);
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dmaStreamSetTransactionSize(rxdma, RX_BOUNCE_BUFSIZE);
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@ -209,18 +204,21 @@ void ChibiUARTDriver::begin(uint32_t b, uint16_t rxS, uint16_t txS)
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_initialised = true;
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}
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_uart_owner_thd = chThdGetSelfX();
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// setup flow control
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set_flow_control(_flow_control);
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}
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void ChibiUARTDriver::dma_tx_allocate(void)
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{
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osalDbgAssert(txdma == nullptr, "double DMA allocation");
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txdma = STM32_DMA_STREAM(_serial_tab[_serial_num].dma_tx_stream_id);
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txdma = STM32_DMA_STREAM(sdef.dma_tx_stream_id);
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bool dma_allocated = dmaStreamAllocate(txdma,
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12, //IRQ Priority
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(stm32_dmaisr_t)tx_complete,
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(void *)this);
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osalDbgAssert(!dma_allocated, "stream already allocated");
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dmaStreamSetPeripheral(txdma, &((SerialDriver*)_serial)->usart->DR);
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dmaStreamSetPeripheral(txdma, &((SerialDriver*)sdef.serial)->usart->DR);
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}
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void ChibiUARTDriver::dma_tx_deallocate(void)
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@ -234,9 +232,8 @@ void ChibiUARTDriver::dma_tx_deallocate(void)
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void ChibiUARTDriver::tx_complete(void* self, uint32_t flags)
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{
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ChibiUARTDriver* uart_drv = (ChibiUARTDriver*)self;
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if (uart_drv->_dma_tx) {
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uart_drv->dma_handle->unlock_from_IRQ();
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}
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uart_drv->dma_handle->unlock_from_IRQ();
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uart_drv->_last_write_completed_us = AP_HAL::micros();
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uart_drv->tx_bounce_buf_ready = true;
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}
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@ -244,12 +241,12 @@ void ChibiUARTDriver::tx_complete(void* self, uint32_t flags)
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void ChibiUARTDriver::rx_irq_cb(void* self)
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{
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ChibiUARTDriver* uart_drv = (ChibiUARTDriver*)self;
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if (!uart_drv->_dma_rx) {
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if (!uart_drv->sdef.dma_rx) {
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return;
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}
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volatile uint16_t sr = ((SerialDriver*)(uart_drv->_serial))->usart->SR;
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volatile uint16_t sr = ((SerialDriver*)(uart_drv->sdef.serial))->usart->SR;
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if(sr & USART_SR_IDLE) {
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volatile uint16_t dr = ((SerialDriver*)(uart_drv->_serial))->usart->DR;
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volatile uint16_t dr = ((SerialDriver*)(uart_drv->sdef.serial))->usart->DR;
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(void)dr;
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//disable dma, triggering DMA transfer complete interrupt
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uart_drv->rxdma->stream->CR &= ~STM32_DMA_CR_EN;
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@ -262,7 +259,7 @@ void ChibiUARTDriver::rxbuff_full_irq(void* self, uint32_t flags)
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if (uart_drv->_lock_rx_in_timer_tick) {
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return;
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}
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if (!uart_drv->_dma_rx) {
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if (!uart_drv->sdef.dma_rx) {
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return;
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}
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uint8_t len = RX_BOUNCE_BUFSIZE - uart_drv->rxdma->stream->NDTR;
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@ -279,6 +276,9 @@ void ChibiUARTDriver::rxbuff_full_irq(void* self, uint32_t flags)
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chEvtSignalI(uart_drv->_wait.thread_ctx, EVT_DATA);
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chSysUnlockFromISR();
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}
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if (uart_drv->_rts_is_active) {
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uart_drv->update_rts_line();
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}
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}
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void ChibiUARTDriver::begin(uint32_t b)
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@ -291,13 +291,13 @@ void ChibiUARTDriver::end()
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_initialised = false;
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while (_in_timer) hal.scheduler->delay(1);
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if (_is_usb) {
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if (sdef.is_usb) {
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#ifdef HAVE_USB_SERIAL
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sduStop((SerialUSBDriver*)_serial);
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sduStop((SerialUSBDriver*)sdef.serial);
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#endif
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} else {
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sdStop((SerialDriver*)_serial);
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sdStop((SerialDriver*)sdef.serial);
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}
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_readbuf.set_size(0);
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_writebuf.set_size(0);
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@ -305,10 +305,10 @@ void ChibiUARTDriver::end()
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void ChibiUARTDriver::flush()
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{
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if (_is_usb) {
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if (sdef.is_usb) {
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#ifdef HAVE_USB_SERIAL
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sduSOFHookI((SerialUSBDriver*)_serial);
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sduSOFHookI((SerialUSBDriver*)sdef.serial);
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#endif
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} else {
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//TODO: Handle this for other serial ports
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@ -332,10 +332,10 @@ uint32_t ChibiUARTDriver::available() {
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if (!_initialised) {
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return 0;
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}
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if (_is_usb) {
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if (sdef.is_usb) {
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#ifdef HAVE_USB_SERIAL
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if (((SerialUSBDriver*)_serial)->config->usbp->state != USB_ACTIVE) {
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if (((SerialUSBDriver*)sdef.serial)->config->usbp->state != USB_ACTIVE) {
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return 0;
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}
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#endif
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@ -364,7 +364,10 @@ int16_t ChibiUARTDriver::read()
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if (!_readbuf.read_byte(&byte)) {
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return -1;
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}
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if (!_rts_is_active) {
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update_rts_line();
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}
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return byte;
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}
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@ -448,7 +451,7 @@ void ChibiUARTDriver::_timer_tick(void)
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if (!_initialised) return;
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if (_dma_rx && rxdma) {
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if (sdef.dma_rx && rxdma) {
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_lock_rx_in_timer_tick = true;
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//Check if DMA is enabled
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//if not, it might be because the DMA interrupt was silenced
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@ -460,6 +463,9 @@ void ChibiUARTDriver::_timer_tick(void)
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if (_wait.thread_ctx && _readbuf.available() >= _wait.n) {
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chEvtSignal(_wait.thread_ctx, EVT_DATA);
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}
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if (_rts_is_active) {
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update_rts_line();
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}
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}
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//DMA disabled by idle interrupt never got a chance to be handled
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//we will enable it here
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@ -471,14 +477,14 @@ void ChibiUARTDriver::_timer_tick(void)
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}
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// don't try IO on a disconnected USB port
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if (_is_usb) {
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if (sdef.is_usb) {
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#ifdef HAVE_USB_SERIAL
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if (((SerialUSBDriver*)_serial)->config->usbp->state != USB_ACTIVE) {
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if (((SerialUSBDriver*)sdef.serial)->config->usbp->state != USB_ACTIVE) {
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return;
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}
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#endif
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}
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if(_is_usb) {
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if(sdef.is_usb) {
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#ifdef HAVE_USB_SERIAL
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((ChibiGPIO *)hal.gpio)->set_usb_connected();
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#endif
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@ -492,14 +498,14 @@ void ChibiUARTDriver::_timer_tick(void)
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const auto n_vec = _readbuf.reserve(vec, _readbuf.space());
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for (int i = 0; i < n_vec; i++) {
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//Do a non-blocking read
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if (_is_usb) {
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if (sdef.is_usb) {
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ret = 0;
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#ifdef HAVE_USB_SERIAL
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ret = chnReadTimeout((SerialUSBDriver*)_serial, vec[i].data, vec[i].len, TIME_IMMEDIATE);
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ret = chnReadTimeout((SerialUSBDriver*)sdef.serial, vec[i].data, vec[i].len, TIME_IMMEDIATE);
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#endif
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} else if(!_dma_rx){
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} else if(!sdef.dma_rx){
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ret = 0;
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ret = chnReadTimeout((SerialDriver*)_serial, vec[i].data, vec[i].len, TIME_IMMEDIATE);
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ret = chnReadTimeout((SerialDriver*)sdef.serial, vec[i].data, vec[i].len, TIME_IMMEDIATE);
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} else {
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ret = 0;
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}
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@ -518,21 +524,24 @@ void ChibiUARTDriver::_timer_tick(void)
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// write any pending bytes
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n = _writebuf.available();
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if (n > 0) {
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if(!_dma_tx) {
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if(!sdef.dma_tx) {
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ByteBuffer::IoVec vec[2];
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const auto n_vec = _writebuf.peekiovec(vec, n);
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for (int i = 0; i < n_vec; i++) {
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if (_is_usb) {
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if (sdef.is_usb) {
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ret = 0;
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#ifdef HAVE_USB_SERIAL
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ret = chnWriteTimeout((SerialUSBDriver*)_serial, vec[i].data, vec[i].len, TIME_IMMEDIATE);
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ret = chnWriteTimeout((SerialUSBDriver*)sdef.serial, vec[i].data, vec[i].len, TIME_IMMEDIATE);
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#endif
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} else {
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ret = chnWriteTimeout((SerialDriver*)_serial, vec[i].data, vec[i].len, TIME_IMMEDIATE);
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ret = chnWriteTimeout((SerialDriver*)sdef.serial, vec[i].data, vec[i].len, TIME_IMMEDIATE);
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}
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if (ret < 0) {
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break;
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}
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if (ret > 0) {
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_last_write_completed_us = AP_HAL::micros();
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}
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_writebuf.advance(ret);
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/* We wrote less than we asked for, stop */
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@ -554,23 +563,102 @@ void ChibiUARTDriver::_timer_tick(void)
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dmaStreamSetMemory0(txdma, tx_bounce_buf);
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dmaStreamSetTransactionSize(txdma, tx_len);
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uint32_t dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
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dmamode |= STM32_DMA_CR_CHSEL(STM32_DMA_GETCHANNEL(_serial_tab[_serial_num].dma_tx_stream_id,
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_serial_tab[_serial_num].dma_tx_channel_id));
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dmamode |= STM32_DMA_CR_CHSEL(STM32_DMA_GETCHANNEL(sdef.dma_tx_stream_id,
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sdef.dma_tx_channel_id));
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dmamode |= STM32_DMA_CR_PL(0);
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dmaStreamSetMode(txdma, dmamode | STM32_DMA_CR_DIR_M2P |
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STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE);
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dmaStreamEnable(txdma);
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} else if (_dma_tx && txdma) {
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} else if (sdef.dma_tx && txdma) {
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if (!(txdma->stream->CR & STM32_DMA_CR_EN)) {
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if (txdma->stream->NDTR == 0) {
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tx_bounce_buf_ready = true;
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_last_write_completed_us = AP_HAL::micros();
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dma_handle->unlock();
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}
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}
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}
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}
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// handle AUTO flow control mode
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if (_flow_control == FLOW_CONTROL_AUTO) {
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if (_first_write_started_us == 0) {
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_first_write_started_us = AP_HAL::micros();
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}
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if (_last_write_completed_us != 0) {
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_flow_control = FLOW_CONTROL_ENABLE;
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} else if (AP_HAL::micros() - _first_write_started_us > 500*1000UL) {
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// it doesn't look like hw flow control is working
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hal.console->printf("disabling flow control on serial %u\n", sdef.get_index());
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set_flow_control(FLOW_CONTROL_DISABLE);
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}
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}
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}
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end:
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_in_timer = false;
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}
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/*
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change flow control mode for port
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*/
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void ChibiUARTDriver::set_flow_control(enum flow_control flow_control)
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{
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if (sdef.rts_line == 0 || sdef.is_usb) {
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// no hw flow control available
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return;
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}
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_flow_control = flow_control;
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if (!_initialised) {
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// not ready yet, we just set variable for when we call begin
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return;
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}
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switch (_flow_control) {
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case FLOW_CONTROL_DISABLE:
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// force RTS active when flow disabled
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palSetLineMode(sdef.rts_line, 1);
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palClearLine(sdef.rts_line);
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_rts_is_active = true;
|
||||
// disable hardware CTS support
|
||||
((SerialDriver*)(sdef.serial))->usart->CR3 &= ~USART_CR3_CTSE;
|
||||
break;
|
||||
|
||||
case FLOW_CONTROL_AUTO:
|
||||
// reset flow control auto state machine
|
||||
_first_write_started_us = 0;
|
||||
_last_write_completed_us = 0;
|
||||
FALLTHROUGH;
|
||||
|
||||
case FLOW_CONTROL_ENABLE:
|
||||
// we do RTS in software as STM32 hardware RTS support toggles
|
||||
// the pin for every byte which loses a lot of bandwidth
|
||||
palSetLineMode(sdef.rts_line, 1);
|
||||
palClearLine(sdef.rts_line);
|
||||
_rts_is_active = true;
|
||||
// enable hardware CTS support
|
||||
((SerialDriver*)(sdef.serial))->usart->CR3 |= USART_CR3_CTSE;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
software update of rts line. We don't use the HW support for RTS as
|
||||
it has no hysteresis, so it ends up toggling RTS on every byte
|
||||
*/
|
||||
void ChibiUARTDriver::update_rts_line(void)
|
||||
{
|
||||
if (sdef.rts_line == 0 || _flow_control == FLOW_CONTROL_DISABLE) {
|
||||
return;
|
||||
}
|
||||
uint16_t space = _readbuf.space();
|
||||
if (_rts_is_active && space < 16) {
|
||||
_rts_is_active = false;
|
||||
palSetLine(sdef.rts_line);
|
||||
} else if (!_rts_is_active && space > 32) {
|
||||
_rts_is_active = true;
|
||||
palClearLine(sdef.rts_line);
|
||||
}
|
||||
}
|
||||
|
||||
#endif //CONFIG_HAL_BOARD == HAL_BOARD_CHIBIOS
|
||||
|
||||
@ -50,24 +50,28 @@ public:
|
||||
bool is_usb;
|
||||
bool dma_rx;
|
||||
uint8_t dma_rx_stream_id;
|
||||
uint32_t dma_rx_channel_id;
|
||||
uint32_t dma_rx_channel_id;
|
||||
bool dma_tx;
|
||||
uint8_t dma_tx_stream_id;
|
||||
uint32_t dma_tx_channel_id;
|
||||
ioline_t rts_line;
|
||||
uint8_t get_index(void) const {
|
||||
return uint8_t(this - &_serial_tab[0]);
|
||||
}
|
||||
};
|
||||
|
||||
bool wait_timeout(uint16_t n, uint32_t timeout_ms) override;
|
||||
|
||||
void set_flow_control(enum flow_control flow_control) override;
|
||||
enum flow_control get_flow_control(void) override { return _flow_control; }
|
||||
|
||||
private:
|
||||
bool _dma_rx;
|
||||
bool _dma_tx;
|
||||
bool tx_bounce_buf_ready;
|
||||
uint8_t _serial_num;
|
||||
const SerialDef &sdef;
|
||||
|
||||
uint32_t _baudrate;
|
||||
uint16_t tx_len;
|
||||
BaseSequentialStream* _serial;
|
||||
SerialConfig sercfg;
|
||||
bool _is_usb;
|
||||
const thread_t* _uart_owner_thd;
|
||||
|
||||
struct {
|
||||
@ -91,10 +95,19 @@ private:
|
||||
bool _initialised;
|
||||
bool _lock_rx_in_timer_tick = false;
|
||||
Shared_DMA *dma_handle;
|
||||
static const SerialDef _serial_tab[];
|
||||
|
||||
// handling of flow control
|
||||
enum flow_control _flow_control = FLOW_CONTROL_DISABLE;
|
||||
bool _rts_is_active;
|
||||
uint32_t _last_write_completed_us;
|
||||
uint32_t _first_write_started_us;
|
||||
|
||||
static void rx_irq_cb(void* sd);
|
||||
static void rxbuff_full_irq(void* self, uint32_t flags);
|
||||
static void tx_complete(void* self, uint32_t flags);
|
||||
|
||||
void dma_tx_allocate(void);
|
||||
void dma_tx_deallocate(void);
|
||||
void update_rts_line(void);
|
||||
};
|
||||
|
||||
@ -30,6 +30,9 @@ allpins = []
|
||||
# list of configs by type
|
||||
bytype = {}
|
||||
|
||||
# list of configs by label
|
||||
bylabel = {}
|
||||
|
||||
mcu_type = None
|
||||
|
||||
def get_alt_function(mcu, pin, function):
|
||||
@ -41,6 +44,10 @@ def get_alt_function(mcu, pin, function):
|
||||
except ImportError:
|
||||
print("Unable to find module for MCU %s" % mcu)
|
||||
sys.exit(1)
|
||||
|
||||
if function and function.endswith("_RTS") and (function.startswith('USART') or function.startswith('UART')):
|
||||
# we do software RTS
|
||||
return None
|
||||
|
||||
af_labels = ['USART', 'UART', 'SPI', 'I2C', 'SDIO', 'OTG', 'JT', 'TIM']
|
||||
for l in af_labels:
|
||||
@ -81,6 +88,12 @@ class generic_pin(object):
|
||||
def has_extra(self, v):
|
||||
return v in self.extra
|
||||
|
||||
def is_RTS(self):
|
||||
'''return true if this is a RTS pin'''
|
||||
if self.label and self.label.endswith("_RTS") and (self.type.startswith('USART') or self.type.startswith('UART')):
|
||||
return True
|
||||
return False
|
||||
|
||||
def get_MODER(self):
|
||||
'''return one of ALTERNATE, OUTPUT, ANALOG, INPUT'''
|
||||
if self.af is not None:
|
||||
@ -91,6 +104,8 @@ class generic_pin(object):
|
||||
v = "ANALOG"
|
||||
elif self.has_extra("CS"):
|
||||
v = "OUTPUT"
|
||||
elif self.is_RTS():
|
||||
v = "OUTPUT"
|
||||
else:
|
||||
v = "INPUT"
|
||||
return "PIN_MODE_%s(%uU)" % (v, self.pin)
|
||||
@ -212,6 +227,7 @@ def process_line(line):
|
||||
if not type in bytype:
|
||||
bytype[type] = []
|
||||
bytype[type].append(p)
|
||||
bylabel[label] = p
|
||||
af = get_alt_function(mcu_type, a[0], label)
|
||||
if af is not None:
|
||||
p.af = af
|
||||
@ -261,6 +277,32 @@ def write_I2C_config(f):
|
||||
f.write('\n// List of I2C devices\n')
|
||||
f.write('#define HAL_I2C_DEVICE_LIST %s\n\n' % ','.join(devlist))
|
||||
|
||||
def write_UART_config(f):
|
||||
'''write UART config defines'''
|
||||
f.write("\n\n// generated UART configuration lines\n")
|
||||
for u in range(1,9):
|
||||
key = None
|
||||
if 'USART%u_TX' % u in bylabel:
|
||||
key = 'USART%u' % u
|
||||
if 'UART%u_TX' % u in bylabel:
|
||||
key = 'UART%u' % u
|
||||
if 'USART%u_RX' % u in bylabel:
|
||||
key = 'USART%u' % u
|
||||
if 'UART%u_RX' % u in bylabel:
|
||||
key = 'UART%u' % u
|
||||
if key is None:
|
||||
continue
|
||||
if key + "_RTS" in bylabel:
|
||||
# this UART supports RTS, define line for it
|
||||
p = bylabel[key + '_RTS']
|
||||
rts_line = 'PAL_LINE(GPIO%s,%uU)' % (p.port, p.pin)
|
||||
else:
|
||||
rts_line = "0"
|
||||
if key is None:
|
||||
continue
|
||||
f.write("#define %s_CONFIG { (BaseSequentialStream*) &SD%u, false, " % (key, u))
|
||||
f.write("STM32_%s_RX_DMA_CONFIG, STM32_%s_TX_DMA_CONFIG, %s}\n" % (key, key, rts_line))
|
||||
|
||||
def write_prototype_file():
|
||||
'''write the prototype file for apj generation'''
|
||||
pf = open(os.path.join(outdir, "apj.prototype"), "w")
|
||||
@ -314,6 +356,8 @@ def write_hwdef_header(outfilename):
|
||||
|
||||
dma_resolver.write_dma_header(f, periph_list, mcu_type)
|
||||
|
||||
write_UART_config(f)
|
||||
|
||||
f.write('''
|
||||
/*
|
||||
* I/O ports initial setup, this configuration is established soon after reset
|
||||
|
||||
@ -132,8 +132,8 @@ def write_dma_header(f, peripheral_list, mcu_type):
|
||||
curr_dict[key][1],
|
||||
shared))
|
||||
|
||||
# now generate UARTDriver.cpp config lines
|
||||
f.write("\n\n// generated UART configuration lines\n")
|
||||
# now generate UARTDriver.cpp DMA config lines
|
||||
f.write("\n\n// generated UART DMA configuration lines\n")
|
||||
for u in range(1,9):
|
||||
key = None
|
||||
if 'USART%u_TX' % u in peripheral_list:
|
||||
@ -146,15 +146,16 @@ def write_dma_header(f, peripheral_list, mcu_type):
|
||||
key = 'UART%u' % u
|
||||
if key is None:
|
||||
continue
|
||||
f.write("#define %s_CONFIG { (BaseSequentialStream*) &SD%u, false, " % (key, u))
|
||||
f.write("#define STM32_%s_RX_DMA_CONFIG " % key)
|
||||
if key + "_RX" in curr_dict:
|
||||
f.write("true, STM32_UART_%s_RX_DMA_STREAM, STM32_%s_RX_DMA_CHN, " % (key, key))
|
||||
f.write("true, STM32_UART_%s_RX_DMA_STREAM, STM32_%s_RX_DMA_CHN\n" % (key, key))
|
||||
else:
|
||||
f.write("false, 0, 0, ")
|
||||
f.write("false, 0, 0\n")
|
||||
f.write("#define STM32_%s_TX_DMA_CONFIG " % key)
|
||||
if key + "_TX" in curr_dict:
|
||||
f.write("true, STM32_UART_%s_TX_DMA_STREAM, STM32_%s_TX_DMA_CHN}\n" % (key, key))
|
||||
f.write("true, STM32_UART_%s_TX_DMA_STREAM, STM32_%s_TX_DMA_CHN\n" % (key, key))
|
||||
else:
|
||||
f.write("false, 0, 0}\n")
|
||||
f.write("false, 0, 0\n")
|
||||
|
||||
|
||||
if __name__ == '__main__':
|
||||
|
||||
Loading…
Reference in New Issue
Block a user