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26 Commits

Author SHA1 Message Date
Daniel Agar 825d81dd57 boards: px4_fmu-v6x sync with other stm32h7 boards 2021-04-03 14:13:23 -04:00
David Sidrane dcfa3c97ba px4 fmu-v6x:Add remaining SRAM4 & DTCM to heap 2021-04-03 14:13:23 -04:00
David Sidrane 003ef59019 px4_fmu-v6x:Enable UAVCAN 2021-04-03 12:47:20 +02:00
Daniel Agar 6874e9fba0 boards: NuttX disable all NSH memory debug commands (mb, mh, mw) by default 
- closes https://github.com/PX4/PX4-Autopilot/issues/17062
 2021-03-30 09:23:43 -04:00
Daniel Agar 631d1647d3 boards: minimize unnecessary differences in default variants 2021-03-28 14:46:47 -04:00
Daniel Agar e77bffe582 boards: STM32H7 remove CONFIG_MM_REGIONS=3 2021-03-26 17:40:44 -04:00
David Sidrane 817d21bb39 px4 fmu-v6x:Properly configure BDMA 2021-03-23 05:52:27 -07:00
David Sidrane 3581099c09 Revert "boards: disable BDMA on STM32H7 for now" 
This reverts commit f0d1f1d679.
 2021-03-23 05:52:27 -07:00
David Sidrane 2af106d888 px4_fmu-v6x:Use Auto LSE Drive setting 2021-03-05 15:40:09 -05:00
Daniel Agar cd7713eba2 boards: delete unused variants 2021-02-22 20:08:36 -05:00
Daniel Agar 8f0918a16b boards: remove unused linker __param section 2021-02-08 23:22:48 -05:00
Daniel Agar f0d1f1d679 boards: disable BDMA on STM32H7 for now 2021-01-28 21:16:23 +01:00
Daniel Agar 1ec10bfcc6
boards: disable CONFIG_ARMV7M_LAZYFPU again (#16573) 
- this was causing hard faults on the CUAV Nora and possibly other boards, disabling everywhere until we fully understand the root cause
 2021-01-17 22:40:21 -05:00
Daniel Agar cb74cb8692 boards: enable CONFIG_ARMV7M_LAZYFPU everywhere 2021-01-12 09:04:38 +01:00
David Sidrane 44ffc855dc px4_fmu-v6x: Use px4_platform_configure 2020-12-02 20:40:23 -05:00
Daniel Agar 233949a377 NuttX upgrade to 10.0.0+ defconfig changes 2020-10-28 14:25:25 -04:00
David Sidrane c7642288db px4_fmu-v6x: Updates for NuttX 9.1.0+ External schedule_note 2020-09-16 21:32:04 -04:00
David Sidrane 1a51a84130 px4_fmu-v6x: Updates for NuttX 9.1.0+ External schedule_note 2020-09-16 21:32:04 -04:00
David Sidrane 72c681134d px4_fmu-v6x:Add support for DMA on SPI6 2020-09-16 21:32:04 -04:00
David Sidrane f870594f1d px4_fmu-v6x Updates for NuttX 9.1.0- 
px4_fmu-v6x: defconfig MMCSD enable multiblock
 2020-09-16 21:32:04 -04:00
Daniel Agar 2c3441aa90 boards: reduce CONFIG_NFILE_DESCRIPTORS 15 -> 12 
- reduced now that calibration uses uORB::Subscription
 - can likely be reduced further (perhaps < 8) with additional testing
 2020-08-21 10:12:13 -04:00
Daniel Agar e3d31a881e boards: NuttX disable posix message queues 2020-07-17 17:00:21 -04:00
David Sidrane 82b87adfb3 px4_fmu-v6x:default phy is LAN8742 2020-06-09 08:14:22 +02:00
Daniel Agar 5e7d2e830d boards: delete old board.h boilerplate 2020-06-08 19:10:33 -04:00
David Sidrane 73bb18a053 px4_fmu-v6x: Limit Slew rate So IMU works with DMA 
The defualt in NuttX is OSPEED of 50Mhz. This is realy a slew
   rate control. At the default high slew rate the overshoot was
   .7 Volts. On a ICM20649 this was causing the device to output
   garbage. All 0s

   N.B. A passive scope or Logic analyser's probes load will mask
   the failure. Useed a FET probe to verify the issue.
 2020-06-02 13:02:51 -04:00
David Sidrane 5d90c31632 Added PX4 FmuV6X 2020-06-02 13:02:51 -04:00