bugobliterator
8651d99de6
HAL_ChibiOS: move to using parameter STORAGE_FLASH_PAGE instead of define
2021-10-30 19:24:57 +11:00
Andrew Tridgell
47da7f5c9b
HAL_ChibiOS: change RCIN FLOAT to PULLDOWN
...
this lowers the chance of noise on a RCIN pin causing incorrect
protocol detection
2021-10-12 11:52:36 +11:00
Iampete1
0143518954
AP_Hal_ChibiOS: mRoControlZeroF7: add OUTPUT to GPIO
2021-10-05 15:46:02 +11:00
Peter Barker
70aef84997
AP_HAL_ChibiOS: remove definitions of BOARD_PWM_COUNT_DEFAULT
...
No longer used
2021-08-20 10:51:19 +10:00
Andrew Tridgell
bbd32844d1
HAL_ChibiOS: switch more boards to 32k FRAM
...
this enables the parameter backup/restore on those boards, as well as
more waypoints
This is in response to a report that CUAVv5 boards can suffer from the
parameter reset issue
2021-03-21 11:59:12 +11:00
Andrew Tridgell
814393c9c2
HAL_ChibiOS: switch from DPS280 to DPS310 in boards that use the DPS310
2021-02-09 11:37:07 +11:00
Phillip Kocmoud
a379bb8fc5
hwdef: mRo Control Zero F7 update and improve uniformity
2020-11-28 20:28:22 +11:00
Andrew Tridgell
571fbf8f71
HAL_ChibiOS: update power VALID pins
2020-06-04 09:51:27 +10:00
Andrew Tridgell
32cdfddf12
HAL_ChibiOS: convert all hwdef from UART_ORDER to SERIAL_ORDER
...
much easier to understand
2020-04-28 10:32:23 +10:00
Andrew Tridgell
a9df9fe0c0
HAL_ChibiOS: removed clock tree settings in most hwdef.dat
...
these are better set automatically in the headers. This simplifies the
task of doing a new port
2020-04-28 10:32:23 +10:00
Andrew Tridgell
e8b2b52bae
HAL_ChibiOS: removed STM32_VDD from hwdef.dat
...
use default
2020-04-28 10:32:23 +10:00
Andrew Tridgell
793b867706
HAL_ChibiOS: switched to new USB VID for dual-CDC boards
2020-01-06 09:55:26 +11:00
Andrew Tridgell
d422825715
HAL_ChibiOS: removed per-board AP_FEATURE_RTSCTS and AP_FEATURE_SBUS_OUT
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not needed any more
2019-12-18 17:18:44 +11:00
Phillip Kocmoud
73c56220ff
HAL_ChibiOS: update mRoControlZeroF7 I2C mask
2019-11-27 16:08:19 +11:00
Andrew Tridgell
97dc76732c
HAL_ChibiOS: drop mRoControlZeroF7 DPS310 clock to 5MHz
2019-10-15 10:22:15 +11:00
Andrew Tridgell
e820219202
HAL_ChibiOS: changed optimisation of higher end boards to -O2
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-O3 does not seem to be a win, and takes up a lot more flash
2019-09-28 08:57:26 +10:00
Andrew Tridgell
98f578394f
HAL_ChibiOS: default OTG2 protocol to mavlink2 on most boards
...
For boards that haven't yet had a driver update in MissionPlanner to
cope with the 2nd OTG interface this change makes both interfaces work
as MAVLink
This also fixes an issue with connecting under a windows VM within
vmware
2019-07-26 21:58:57 +10:00
Andrew Tridgell
1919268801
HAL_ChibiOS: added OTG2 on all F7 and H7 boards with CAN
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allows for SLCAN on 2nd port
2019-07-12 17:01:21 +10:00
Andrew Tridgell
ceb9c3b83e
HAL_ChibiOS: convert mRoControlZeroF7 to new sensor config
2019-05-30 15:39:57 +10:00
Phillip Kocmoud
9709401595
HAL_ChibiOS: added hwdef for mRoControlZeroF7
2019-05-10 15:05:42 +10:00