Andrew Tridgell
|
68146d541c
|
HAL_ChibiOS: removed boilerplate lines from bootloaders
|
2021-10-26 15:56:53 +11:00 |
Andrew Tridgell
|
47da7f5c9b
|
HAL_ChibiOS: change RCIN FLOAT to PULLDOWN
this lowers the chance of noise on a RCIN pin causing incorrect
protocol detection
|
2021-10-12 11:52:36 +11:00 |
Peter Barker
|
70aef84997
|
AP_HAL_ChibiOS: remove definitions of BOARD_PWM_COUNT_DEFAULT
No longer used
|
2021-08-20 10:51:19 +10:00 |
Andrew Tridgell
|
91dce554d1
|
HAL_ChibiOS: removed unnecessary USB product IDs from boards
|
2021-05-27 09:30:30 +09:00 |
Andrew Tridgell
|
32cdfddf12
|
HAL_ChibiOS: convert all hwdef from UART_ORDER to SERIAL_ORDER
much easier to understand
|
2020-04-28 10:32:23 +10:00 |
Andrew Tridgell
|
a9df9fe0c0
|
HAL_ChibiOS: removed clock tree settings in most hwdef.dat
these are better set automatically in the headers. This simplifies the
task of doing a new port
|
2020-04-28 10:32:23 +10:00 |
Andrew Tridgell
|
e8b2b52bae
|
HAL_ChibiOS: removed STM32_VDD from hwdef.dat
use default
|
2020-04-28 10:32:23 +10:00 |
Peter Barker
|
1a123e5f8d
|
AP_HAL_ChibiOS: avoid referencing flash sector/page 22 on 1MB boards
|
2020-03-03 10:13:53 +11:00 |
Andrew Tridgell
|
2b0a30a2c5
|
HAL_ChibiOS: ensure we don't overflow bootloader area
this modifies the ld script to use the maximum size available for the
bootloader, so we can't accidentially grow the bootloader beyond its
max size
|
2019-05-06 12:36:41 +10:00 |
Andrew Tridgell
|
ff52ceabba
|
HAL_ChibiOS: fixed default volt and current pins for VRBrain
|
2019-01-24 18:41:38 +11:00 |
LukeMike
|
db61e50fe8
|
HAL_ChibiOS: fixed USB_PRODUCT for VR Brain 5.2
|
2019-01-24 18:41:38 +11:00 |
Andrew Tridgell
|
b8aa6e5834
|
HAL_ChibiOS: rename VRBrain hwdef folders
nicer names in fw download
|
2019-01-18 11:49:19 +11:00 |