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HAL_ChibiOS: use SRAM1 as first ram segment on H7 

this is needed to give the linker more than 128k for static variables
with double precision maths.
This commit is contained in:
Andrew Tridgell 2021-05-06 09:50:46 +10:00
parent 309500c84f
commit c6c197d4fb
1 changed files with 1 additions and 1 deletions
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2
libraries/AP_HAL_ChibiOS/hwdef/scripts/STM32H743xx.py
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@ -26,8 +26,8 @@ mcu = {
# flags of 2 means faster memory for CPU intensive work # flags of 2 means faster memory for CPU intensive work
# flags of 4 means memory can be used for SDMMC DMA # flags of 4 means memory can be used for SDMMC DMA
'RAM_MAP' : [ 'RAM_MAP' : [
(0x20000000, 128, 2), # DTCM, tightly coupled, no DMA, fast
(0x30000000, 256, 0), # SRAM1, SRAM2 (0x30000000, 256, 0), # SRAM1, SRAM2
(0x20000000, 128, 2), # DTCM, tightly coupled, no DMA, fast
(0x24000000, 512, 4), # AXI SRAM. Use this for SDMMC IDMA ops (0x24000000, 512, 4), # AXI SRAM. Use this for SDMMC IDMA ops
(0x00000400, 63, 2), # ITCM (first 1k removed, to keep address 0 unused) (0x00000400, 63, 2), # ITCM (first 1k removed, to keep address 0 unused)
(0x30040000, 32, 0), # SRAM3. (0x30040000, 32, 0), # SRAM3.