ardupilot/libraries/AP_HAL_ChibiOS/hwdef/mindpx-v2/hwdef.dat


# hw definition file for processing by chibios_hwdef.py
# for MindPX-v2 hardware

# MCU class and specific type
MCU STM32F4xx STM32F427xx

# board ID for firmware load
APJ_BOARD_ID 88

# crystal frequency
OSCILLATOR_HZ 8000000
STM32_PLLM_VALUE 8

STM32_ST_USE_TIMER 5
HRT_TIMER 6

# board voltage
STM32_VDD 330U

# flash size
FLASH_SIZE_KB 2048

# space to reserve for bootloader and storage at start of flash
FLASH_RESERVE_START_KB 16

# space to reserve for storage at end of flash
FLASH_RESERVE_END_KB 0

# this board has 64k of CCM memory
CCM_RAM_SIZE_KB 64

# serial port for stdout
STDOUT_SERIAL SD7
STDOUT_BAUDRATE 57600

# order of I2C buses
I2C_ORDER I2C1 I2C2

# order of UARTs (and USB)
UART_ORDER OTG1 UART4 USART2 USART3 UART8 USART1

# UART4 is GPS
PA0 UART4_TX UART4
PA1 UART4_RX UART4
PA2 TIM2_CH3 TIM2 PWM(15)
PA3 TIM2_CH4 TIM2 PWM(16)
PA4 VDD_5V_SENS ADC1 SCALE(2)

# SPI1 is fram bus
PA5 SPI1_SCK SPI1
PA6 SPI1_MISO SPI1
PA7 TONE INPUT

PA8 RUN_LED OUTPUT GPIO(0)
PA9 VBUS INPUT
PA10 SBUS_INV OUTPUT

PA11 OTG_FS_DM OTG1
PA12 OTG_FS_DP OTG1

PA13 JTMS-SWDIO SWD
PA14 JTCK-SWCLK SWD

PA15 TIM2_CH1 TIM2 PWM(13) GPIO(54)

PB0 TIM3_CH3 TIM3 PWM(11) GPIO(52)
PB1 TIM3_CH4 TIM3 PWM(12) GPIO(53)
PB2 GYRO_CS CS
PB3 TIM2_CH2 TIM2 PWM(14) GPIO(55)
PB4 TIM3_CH1 TIM3 PWM(9) GPIO(50)
PB5 SPI1_MOSI SPI1

# USART1 is SBUS
PB6 USART1_TX USART1
PB7 USART1_RX USART1

# I2C1 is mag I2C
PB8 I2C1_SCL I2C1
PB9 I2C1_SDA I2C1

# I2C2 is FMU I2C
PB10 I2C2_SCL I2C2
PB11 I2C2_SDA I2C2

PB12 FRSKY_INV OUTPUT

# SPI2 is external SPI (radio NRF)
PB13 SPI2_SCK SPI2
PB14 SPI2_MISO SPI2
PB15 SPI2_MOSI SPI2

PC0 BAT_CURR_SENS ADC1
PC1 FMU_GPIO3 INPUT # RSSI
PC2 BAT_VOLT_SENS ADC1
PC3 FMU_ADC1 ADC1
PC4 FMU_ADC2 ADC1
PC5 FMU_ADC3 ADC1
PC6 TIM8_CH1 TIM8 RCIN PULLUP LOW DMA_CH0 # also USART6_RX for serial RC
PC7 TIM3_CH2 TIM3 PWM(10) GPIO(51)

PC8 SDIO_D0 SDIO
PC9 SDIO_D1 SDIO
PC10 SDIO_D2 SDIO
PC11 SDIO_D3 SDIO
PC12 SDIO_CK SDIO

PC13 ACCEL_DRDY INPUT
PC14 MAG_DRDY INPUT
PC15 BARO_CS CS

PD0 CAN1_RX CAN1
PD1 CAN1_TX CAN1
PD2 SDIO_CMD SDIO

# USART2 serial2 telem1
PD3 USART2_CTS USART2
PD4 USART2_RTS USART2
PD5 USART2_TX USART2
PD6 USART2_RX USART2
PD7 NRF_CSN INPUT

# USART3 serial3 telem2
PD8 USART3_TX USART3
PD9 USART3_RX USART3
PD10 NRF_INT INPUT
PD11 ACCEL_MAG_CS CS

PD12 TIM4_CH1 TIM4 PWM(5)
PD13 TIM4_CH2 TIM4 PWM(6)
PD14 TIM4_CH3 TIM4 PWM(7)
PD15 TIM4_CH4 TIM4 PWM(8)

# UART8 is FrSky
PE0 UART8_RX UART8
PE1 UART8_TX UART8

# SPI4 is M_SPI (main sensors)
PE2 SPI4_SCK SPI4
PE3 MPU_CS CS
PE4 GYRO_DRDY INPUT
PE5 SPI4_MISO SPI4
PE6 SPI4_MOSI SPI4

# UART7 is debug
PE7 UART7_RX UART7 
PE8 UART7_TX UART7

PE9 TIM1_CH1 TIM1 PWM(1)
PE10 MPU_DRDY INPUT
PE11 TIM1_CH2 TIM1 PWM(2)
PE12 FRAM_CS CS
PE13 TIM1_CH3 TIM1 PWM(3)
PE14 TIM1_CH4 TIM1 PWM(4)
PE15 NRF_CS CS

# SPI device table
SPIDEV ms5611     SPI4  DEVID1 BARO_CS      MODE3   2*MHZ  2*MHZ
SPIDEV mpu6500    SPI4  DEVID2 MPU_CS       MODE3 500*KHZ  2*MHZ
SPIDEV lsm9ds0_am SPI4  DEVID3 ACCEL_MAG_CS MODE3  11*MHZ 11*MHZ
SPIDEV lsm9ds0_g  SPI4  DEVID4 GYRO_CS      MODE3  11*MHZ 11*MHZ
SPIDEV ramtron    SPI1  DEVID5 FRAM_CS      MODE3   8*MHZ  8*MHZ
SPIDEV radio      SPI2  DEVID6 NRF_CS       MODE3   2*MHZ  2*MHZ

define HAL_CHIBIOS_ARCH_MINDPXV2 1

define HAL_BOARD_LOG_DIRECTORY "/APM/LOGS"

define HAL_STORAGE_SIZE 16384

# enable RAMTROM parameter storage
define HAL_WITH_RAMTRON 1

# fallback to flash storage
define STORAGE_FLASH_PAGE 22

# enable FAT filesystem
#define HAL_OS_FATFS_IO 1

# enable RTSCTS
define AP_FEATURE_RTSCTS 1

# battery setup
define HAL_BATT_VOLT_PIN 12
define HAL_BATT_CURR_PIN 10
define HAL_BATT_VOLT_SCALE 10.1
define HAL_BATT_CURR_SCALE 17.0
HAL_ChibOS: auto-generate full PWM config use PWM markers in hwdef.dat to mark each PWM channel 2018-01-12 04:29:16 -04:00
HAL_ChibiOS: added support for MindPX-v2 2018-01-11 17:25:29 -04:00			`# hw definition file for processing by chibios_hwdef.py`
			`# for MindPX-v2 hardware`

			`# MCU class and specific type`
			`MCU STM32F4xx STM32F427xx`

			`# board ID for firmware load`
			`APJ_BOARD_ID 88`

			`# crystal frequency`
			`OSCILLATOR_HZ 8000000`
HAL_ChibiOS: moved to a common mcuconf.h 2018-01-11 22:50:41 -04:00			`STM32_PLLM_VALUE 8`
HAL_ChibiOS: added support for MindPX-v2 2018-01-11 17:25:29 -04:00
HAL_ChibOS: auto-generate full PWM config use PWM markers in hwdef.dat to mark each PWM channel 2018-01-12 04:29:16 -04:00			`STM32_ST_USE_TIMER 5`
			`HRT_TIMER 6`

HAL_ChibiOS: added support for MindPX-v2 2018-01-11 17:25:29 -04:00			`# board voltage`
			`STM32_VDD 330U`

HAL_ChibiOS: use a common makefile and board.c allow for custom files per board if supplied, but don't require them for every board 2018-01-12 17:33:58 -04:00			`# flash size`
			`FLASH_SIZE_KB 2048`

HAL_ChibiOS: moved to generated loader script 2018-01-12 21:29:11 -04:00			`# space to reserve for bootloader and storage at start of flash`
			`FLASH_RESERVE_START_KB 16`

			`# space to reserve for storage at end of flash`
			`FLASH_RESERVE_END_KB 0`

			`# this board has 64k of CCM memory`
			`CCM_RAM_SIZE_KB 64`

HAL_ChibiOS: added support for MindPX-v2 2018-01-11 17:25:29 -04:00			`# serial port for stdout`
			`STDOUT_SERIAL SD7`
			`STDOUT_BAUDRATE 57600`

HAL_Chibios: auto-generate I2C, SPI and UART device lists this is less error prone and make a port faster as more information is in hwdef.dat 2018-01-11 19:20:49 -04:00			`# order of I2C buses`
			`I2C_ORDER I2C1 I2C2`
HAL_ChibiOS: added support for MindPX-v2 2018-01-11 17:25:29 -04:00
HAL_Chibios: auto-generate I2C, SPI and UART device lists this is less error prone and make a port faster as more information is in hwdef.dat 2018-01-11 19:20:49 -04:00			`# order of UARTs (and USB)`
			`UART_ORDER OTG1 UART4 USART2 USART3 UART8 USART1`
HAL_ChibiOS: added support for MindPX-v2 2018-01-11 17:25:29 -04:00
			`# UART4 is GPS`
			`PA0 UART4_TX UART4`
			`PA1 UART4_RX UART4`
HAL_ChibiOS: auto-generate GPIO table from hwdef.dat 2018-01-13 01:34:48 -04:00			`PA2 TIM2_CH3 TIM2 PWM(15)`
			`PA3 TIM2_CH4 TIM2 PWM(16)`
HAL_ChibiOS: fixed 5V analog scale on fmuv4 and mindpx-v2 2018-01-13 01:56:29 -04:00			`PA4 VDD_5V_SENS ADC1 SCALE(2)`
HAL_ChibiOS: added support for MindPX-v2 2018-01-11 17:25:29 -04:00
			`# SPI1 is fram bus`
			`PA5 SPI1_SCK SPI1`
			`PA6 SPI1_MISO SPI1`
			`PA7 TONE INPUT`

HAL_ChibiOS: auto-generate GPIO table from hwdef.dat 2018-01-13 01:34:48 -04:00			`PA8 RUN_LED OUTPUT GPIO(0)`
HAL_ChibiOS: added support for MindPX-v2 2018-01-11 17:25:29 -04:00			`PA9 VBUS INPUT`
			`PA10 SBUS_INV OUTPUT`

			`PA11 OTG_FS_DM OTG1`
			`PA12 OTG_FS_DP OTG1`

			`PA13 JTMS-SWDIO SWD`
			`PA14 JTCK-SWCLK SWD`

HAL_ChibiOS: auto-generate GPIO table from hwdef.dat 2018-01-13 01:34:48 -04:00			`PA15 TIM2_CH1 TIM2 PWM(13) GPIO(54)`
HAL_ChibiOS: added support for MindPX-v2 2018-01-11 17:25:29 -04:00
HAL_ChibiOS: auto-generate GPIO table from hwdef.dat 2018-01-13 01:34:48 -04:00			`PB0 TIM3_CH3 TIM3 PWM(11) GPIO(52)`
			`PB1 TIM3_CH4 TIM3 PWM(12) GPIO(53)`
HAL_ChibiOS: CS pins don't need to be a single SPI BUS its possible to use a CS pin on different buses, so they should not have a particular bus tag 2018-01-11 22:27:25 -04:00			`PB2 GYRO_CS CS`
HAL_ChibiOS: auto-generate GPIO table from hwdef.dat 2018-01-13 01:34:48 -04:00			`PB3 TIM2_CH2 TIM2 PWM(14) GPIO(55)`
			`PB4 TIM3_CH1 TIM3 PWM(9) GPIO(50)`
HAL_ChibiOS: added support for MindPX-v2 2018-01-11 17:25:29 -04:00			`PB5 SPI1_MOSI SPI1`

			`# USART1 is SBUS`
			`PB6 USART1_TX USART1`
			`PB7 USART1_RX USART1`

			`# I2C1 is mag I2C`
			`PB8 I2C1_SCL I2C1`
			`PB9 I2C1_SDA I2C1`

			`# I2C2 is FMU I2C`
			`PB10 I2C2_SCL I2C2`
			`PB11 I2C2_SDA I2C2`

			`PB12 FRSKY_INV OUTPUT`

			`# SPI2 is external SPI (radio NRF)`
			`PB13 SPI2_SCK SPI2`
			`PB14 SPI2_MISO SPI2`
			`PB15 SPI2_MOSI SPI2`

			`PC0 BAT_CURR_SENS ADC1`
			`PC1 FMU_GPIO3 INPUT # RSSI`
			`PC2 BAT_VOLT_SENS ADC1`
			`PC3 FMU_ADC1 ADC1`
			`PC4 FMU_ADC2 ADC1`
			`PC5 FMU_ADC3 ADC1`
HAL_ChibiOS: support RCIN on mindpx-v2 2018-01-18 15:52:11 -04:00			`PC6 TIM8_CH1 TIM8 RCIN PULLUP LOW DMA_CH0 # also USART6_RX for serial RC`
HAL_ChibiOS: auto-generate GPIO table from hwdef.dat 2018-01-13 01:34:48 -04:00			`PC7 TIM3_CH2 TIM3 PWM(10) GPIO(51)`
HAL_ChibiOS: added support for MindPX-v2 2018-01-11 17:25:29 -04:00
			`PC8 SDIO_D0 SDIO`
			`PC9 SDIO_D1 SDIO`
			`PC10 SDIO_D2 SDIO`
			`PC11 SDIO_D3 SDIO`
			`PC12 SDIO_CK SDIO`

			`PC13 ACCEL_DRDY INPUT`
			`PC14 MAG_DRDY INPUT`
HAL_ChibiOS: CS pins don't need to be a single SPI BUS its possible to use a CS pin on different buses, so they should not have a particular bus tag 2018-01-11 22:27:25 -04:00			`PC15 BARO_CS CS`
HAL_ChibiOS: added support for MindPX-v2 2018-01-11 17:25:29 -04:00
			`PD0 CAN1_RX CAN1`
			`PD1 CAN1_TX CAN1`
			`PD2 SDIO_CMD SDIO`

			`# USART2 serial2 telem1`
			`PD3 USART2_CTS USART2`
			`PD4 USART2_RTS USART2`
			`PD5 USART2_TX USART2`
			`PD6 USART2_RX USART2`
			`PD7 NRF_CSN INPUT`

			`# USART3 serial3 telem2`
			`PD8 USART3_TX USART3`
			`PD9 USART3_RX USART3`
			`PD10 NRF_INT INPUT`
HAL_ChibiOS: CS pins don't need to be a single SPI BUS its possible to use a CS pin on different buses, so they should not have a particular bus tag 2018-01-11 22:27:25 -04:00			`PD11 ACCEL_MAG_CS CS`
HAL_ChibiOS: added support for MindPX-v2 2018-01-11 17:25:29 -04:00
HAL_ChibiOS: auto-generate GPIO table from hwdef.dat 2018-01-13 01:34:48 -04:00			`PD12 TIM4_CH1 TIM4 PWM(5)`
			`PD13 TIM4_CH2 TIM4 PWM(6)`
			`PD14 TIM4_CH3 TIM4 PWM(7)`
			`PD15 TIM4_CH4 TIM4 PWM(8)`
HAL_ChibiOS: added support for MindPX-v2 2018-01-11 17:25:29 -04:00
			`# UART8 is FrSky`
			`PE0 UART8_RX UART8`
			`PE1 UART8_TX UART8`

			`# SPI4 is M_SPI (main sensors)`
			`PE2 SPI4_SCK SPI4`
HAL_ChibiOS: CS pins don't need to be a single SPI BUS its possible to use a CS pin on different buses, so they should not have a particular bus tag 2018-01-11 22:27:25 -04:00			`PE3 MPU_CS CS`
HAL_ChibiOS: added support for MindPX-v2 2018-01-11 17:25:29 -04:00			`PE4 GYRO_DRDY INPUT`
			`PE5 SPI4_MISO SPI4`
			`PE6 SPI4_MOSI SPI4`

			`# UART7 is debug`
			`PE7 UART7_RX UART7`
			`PE8 UART7_TX UART7`

HAL_ChibiOS: auto-generate GPIO table from hwdef.dat 2018-01-13 01:34:48 -04:00			`PE9 TIM1_CH1 TIM1 PWM(1)`
HAL_ChibiOS: added support for MindPX-v2 2018-01-11 17:25:29 -04:00			`PE10 MPU_DRDY INPUT`
HAL_ChibiOS: auto-generate GPIO table from hwdef.dat 2018-01-13 01:34:48 -04:00			`PE11 TIM1_CH2 TIM1 PWM(2)`
HAL_ChibiOS: CS pins don't need to be a single SPI BUS its possible to use a CS pin on different buses, so they should not have a particular bus tag 2018-01-11 22:27:25 -04:00			`PE12 FRAM_CS CS`
HAL_ChibiOS: auto-generate GPIO table from hwdef.dat 2018-01-13 01:34:48 -04:00			`PE13 TIM1_CH3 TIM1 PWM(3)`
			`PE14 TIM1_CH4 TIM1 PWM(4)`
HAL_ChibiOS: CS pins don't need to be a single SPI BUS its possible to use a CS pin on different buses, so they should not have a particular bus tag 2018-01-11 22:27:25 -04:00			`PE15 NRF_CS CS`
HAL_Chibios: moved SPI device tables to hwdef.dat 2018-01-11 21:01:06 -04:00
			`# SPI device table`
			`SPIDEV ms5611 SPI4 DEVID1 BARO_CS MODE3 2MHZ 2MHZ`
			`SPIDEV mpu6500 SPI4 DEVID2 MPU_CS MODE3 500KHZ 2MHZ`
			`SPIDEV lsm9ds0_am SPI4 DEVID3 ACCEL_MAG_CS MODE3 11MHZ 11MHZ`
			`SPIDEV lsm9ds0_g SPI4 DEVID4 GYRO_CS MODE3 11MHZ 11MHZ`
			`SPIDEV ramtron SPI1 DEVID5 FRAM_CS MODE3 8MHZ 8MHZ`
			`SPIDEV radio SPI2 DEVID6 NRF_CS MODE3 2MHZ 2MHZ`
HAL_ChibiOS: moved board defines to hwdef.dat 2018-01-14 04:00:47 -04:00
			`define HAL_CHIBIOS_ARCH_MINDPXV2 1`

			`define HAL_BOARD_LOG_DIRECTORY "/APM/LOGS"`

			`define HAL_STORAGE_SIZE 16384`

			`# enable RAMTROM parameter storage`
			`define HAL_WITH_RAMTRON 1`

			`# fallback to flash storage`
			`define STORAGE_FLASH_PAGE 22`

			`# enable FAT filesystem`
			`#define HAL_OS_FATFS_IO 1`

HAL_ChibiOS: enable RTSCTS and SBUS_OUT 2018-01-19 18:43:01 -04:00			`# enable RTSCTS`
			`define AP_FEATURE_RTSCTS 1`
HAL_ChibiOS: setup correct volt and current pins use hwdef.dat to specify battery pins 2018-02-04 00:09:19 -04:00
			`# battery setup`
			`define HAL_BATT_VOLT_PIN 12`
			`define HAL_BATT_CURR_PIN 10`
			`define HAL_BATT_VOLT_SCALE 10.1`
			`define HAL_BATT_CURR_SCALE 17.0`