2017-12-26 19:03:21 -04:00
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/*
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implement protocol for controlling an IO microcontroller
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For bootstrapping this will initially implement the px4io protocol,
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but will later move to an ArduPilot specific protocol
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*/
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2023-04-30 20:29:02 -03:00
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#pragma once
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2017-12-26 19:03:21 -04:00
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#include <AP_HAL/AP_HAL.h>
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2018-01-02 01:47:42 -04:00
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#if HAL_WITH_IO_MCU
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2018-05-10 21:37:01 -03:00
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#include "iofirmware/ioprotocol.h"
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2018-10-30 21:07:47 -03:00
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#include <AP_RCMapper/AP_RCMapper.h>
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2023-06-17 19:26:56 -03:00
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#include <AP_HAL/RCOutput.h>
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2018-01-16 06:21:59 -04:00
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2022-02-21 03:38:21 -04:00
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typedef uint32_t eventmask_t;
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typedef struct ch_thread thread_t;
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2017-12-26 19:03:21 -04:00
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class AP_IOMCU {
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public:
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AP_IOMCU(AP_HAL::UARTDriver &uart);
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2017-12-27 03:24:15 -04:00
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void init(void);
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// write to one channel
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2017-12-26 19:03:21 -04:00
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void write_channel(uint8_t chan, uint16_t pwm);
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2017-12-27 03:24:15 -04:00
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// read from one channel
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uint16_t read_channel(uint8_t chan);
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// cork output
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void cork(void);
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// push output
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void push(void);
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// set output frequency
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void set_freq(uint16_t chmask, uint16_t freq);
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// get output frequency
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uint16_t get_freq(uint16_t chan);
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// get state of safety switch
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AP_HAL::Util::safety_state get_safety_switch_state(void) const;
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// force safety on
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bool force_safety_on(void);
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// force safety off
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void force_safety_off(void);
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2018-04-14 00:54:04 -03:00
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// set mask of channels that ignore safety state
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void set_safety_mask(uint16_t chmask);
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2018-09-12 17:22:26 -03:00
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// set PWM of channels when in FMU failsafe
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void set_failsafe_pwm(uint16_t chmask, uint16_t period_us);
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2019-10-20 10:47:14 -03:00
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2017-12-31 22:28:59 -04:00
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/*
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enable sbus output
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*/
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bool enable_sbus_out(uint16_t rate_hz);
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/*
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check for new RC input
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*/
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bool check_rcinput(uint32_t &last_frame_us, uint8_t &num_channels, uint16_t *channels, uint8_t max_channels);
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2017-12-31 22:51:10 -04:00
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2018-08-26 12:06:10 -03:00
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// Do DSM receiver binding
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void bind_dsm(uint8_t mode);
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2018-11-05 01:44:20 -04:00
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// get the name of the RC protocol
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const char *get_rc_protocol(void);
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2019-12-02 03:46:36 -04:00
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// get receiver RSSI
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int16_t get_RSSI(void) const {
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return rc_input.rssi;
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}
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2017-12-31 22:51:10 -04:00
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/*
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2021-09-28 13:40:08 -03:00
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get servo rail voltage adc counts
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2017-12-31 22:51:10 -04:00
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*/
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2021-09-28 13:40:08 -03:00
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uint16_t get_vservo_adc_count(void) const { return reg_status.vservo; }
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2017-12-31 22:51:10 -04:00
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/*
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2021-09-28 13:40:08 -03:00
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get rssi voltage adc counts
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2017-12-31 22:51:10 -04:00
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*/
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2021-09-28 13:40:08 -03:00
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uint16_t get_vrssi_adc_count(void) const { return reg_status.vrssi; }
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2018-01-03 02:25:30 -04:00
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// set target for IMU heater
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void set_heater_duty_cycle(uint8_t duty_cycle);
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2018-01-12 23:52:29 -04:00
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// set default output rate
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void set_default_rate(uint16_t rate_hz);
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2018-01-16 01:37:14 -04:00
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// set to oneshot mode
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void set_oneshot_mode(void);
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2018-07-12 23:28:43 -03:00
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// set to brushed mode
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void set_brushed_mode(void);
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2019-10-20 10:47:14 -03:00
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2020-07-11 09:22:05 -03:00
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// set output mode
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void set_output_mode(uint16_t mask, uint16_t mode);
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2023-06-17 19:26:56 -03:00
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// get output mode
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AP_HAL::RCOutput::output_mode get_output_mode(uint8_t& mask) const;
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// MCUID
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uint32_t get_mcu_id() const { return config.mcuid; }
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2023-06-24 15:16:43 -03:00
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// CPUID
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uint32_t get_cpu_id() const { return config.cpuid; }
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2023-05-24 17:43:17 -03:00
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#if HAL_DSHOT_ENABLED
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// set dshot output period
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void set_dshot_period(uint16_t period_us, uint8_t drate);
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// set telem request mask
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void set_telem_request_mask(uint32_t mask);
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// send a dshot command
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void send_dshot_command(uint8_t command, uint8_t chan, uint32_t command_timeout_ms, uint16_t repeat_count, bool priority);
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#endif
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// setup channels
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void enable_ch(uint8_t ch);
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void disable_ch(uint8_t ch);
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2018-04-16 19:04:33 -03:00
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// check if IO is healthy
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bool healthy(void);
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2018-10-29 18:50:59 -03:00
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// shutdown IO protocol (for reboot)
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void shutdown();
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2023-05-24 17:43:17 -03:00
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void soft_reboot();
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2018-10-30 21:07:47 -03:00
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// setup for FMU failsafe mixing
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2018-10-31 01:09:49 -03:00
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bool setup_mixing(RCMapper *rcmap, int8_t override_chan,
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float mixing_gain, uint16_t manual_rc_mask);
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2019-10-20 10:47:14 -03:00
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2022-04-20 22:14:10 -03:00
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// Check if pin number is valid and configured for GPIO
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2021-09-20 10:44:12 -03:00
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bool valid_GPIO_pin(uint8_t pin) const;
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// convert external pin numbers 101 to 108 to internal 0 to 7
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bool convert_pin_number(uint8_t& pin) const;
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// set GPIO mask of channels setup for output
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void set_GPIO_mask(uint8_t mask);
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// write to a output pin
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void write_GPIO(uint8_t pin, bool value);
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// toggle a output pin
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void toggle_GPIO(uint8_t pin);
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2019-09-22 19:52:31 -03:00
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// channel group masks
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const uint8_t ch_masks[3] = { 0x03,0x0C,0xF0 };
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2019-11-01 23:32:48 -03:00
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static AP_IOMCU *get_singleton(void) {
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return singleton;
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}
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2017-12-26 19:03:21 -04:00
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private:
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AP_HAL::UARTDriver &uart;
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2017-12-27 03:24:15 -04:00
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void thread_main(void);
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// read count 16 bit registers
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bool read_registers(uint8_t page, uint8_t offset, uint8_t count, uint16_t *regs);
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// write count 16 bit registers
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bool write_registers(uint8_t page, uint8_t offset, uint8_t count, const uint16_t *regs);
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// write a single register
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bool write_register(uint8_t page, uint8_t offset, uint16_t v) {
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return write_registers(page, offset, 1, &v);
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}
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2019-10-20 10:47:14 -03:00
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2017-12-27 03:24:15 -04:00
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// modify a single register
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bool modify_register(uint8_t page, uint8_t offset, uint16_t clearbits, uint16_t setbits);
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// trigger an ioevent
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void trigger_event(uint8_t event);
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// IOMCU thread
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thread_t *thread_ctx;
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2018-11-03 03:27:10 -03:00
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eventmask_t initial_event_mask;
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2017-12-27 03:24:15 -04:00
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// time when we last read various pages
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uint32_t last_status_read_ms;
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uint32_t last_rc_read_ms;
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uint32_t last_servo_read_ms;
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2018-04-13 03:17:08 -03:00
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uint32_t last_safety_option_check_ms;
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2023-02-10 21:40:26 -04:00
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uint32_t last_reg_read_ms;
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2018-04-13 03:17:08 -03:00
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// last value of safety options
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uint16_t last_safety_options = 0xFFFF;
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2017-12-27 03:24:15 -04:00
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2018-09-03 23:16:19 -03:00
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// have we forced the safety off?
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bool safety_forced_off;
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2021-05-21 18:04:43 -03:00
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// was safety off on last status?
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bool last_safety_off;
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2017-12-27 03:24:15 -04:00
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void send_servo_out(void);
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void read_rc_input(void);
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void read_servo(void);
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void read_status(void);
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void discard_input(void);
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2021-02-23 17:47:24 -04:00
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void event_failed(uint32_t event_mask);
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2018-04-13 03:17:08 -03:00
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void update_safety_options(void);
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2020-08-12 23:28:47 -03:00
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void send_rc_protocols(void);
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2018-10-30 21:07:47 -03:00
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// CONFIG page
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struct page_config config;
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2017-12-27 03:24:15 -04:00
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// PAGE_STATUS values
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2018-05-10 21:37:01 -03:00
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struct page_reg_status reg_status;
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2019-08-13 21:07:48 -03:00
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uint32_t last_log_ms;
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2017-12-27 03:24:15 -04:00
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2017-12-27 18:26:11 -04:00
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// PAGE_RAW_RCIN values
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2018-05-10 21:37:01 -03:00
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struct page_rc_input rc_input;
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2019-08-13 21:07:48 -03:00
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uint32_t rc_last_input_ms;
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2018-10-30 21:07:47 -03:00
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// MIXER values
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struct page_mixing mixing;
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2019-10-20 10:47:14 -03:00
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2017-12-27 03:24:15 -04:00
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// output pwm values
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struct {
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uint8_t num_channels;
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2018-01-16 06:21:59 -04:00
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uint16_t pwm[IOMCU_MAX_CHANNELS];
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2018-04-14 00:54:04 -03:00
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uint16_t safety_mask;
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2018-09-12 17:22:26 -03:00
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uint16_t failsafe_pwm[IOMCU_MAX_CHANNELS];
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uint8_t failsafe_pwm_set;
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uint8_t failsafe_pwm_sent;
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2023-05-24 17:43:17 -03:00
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uint16_t channel_mask;
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2017-12-27 03:24:15 -04:00
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} pwm_out;
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// read back pwm values
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struct {
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2018-01-16 06:21:59 -04:00
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uint16_t pwm[IOMCU_MAX_CHANNELS];
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2017-12-27 03:24:15 -04:00
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} pwm_in;
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2017-12-27 05:15:55 -04:00
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// output rates
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struct {
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uint16_t freq;
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uint16_t chmask;
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uint16_t default_freq = 50;
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2017-12-31 22:28:59 -04:00
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uint16_t sbus_rate_hz;
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2021-02-23 17:47:24 -04:00
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bool oneshot_enabled;
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bool brushed_enabled;
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2017-12-27 05:15:55 -04:00
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} rate;
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2018-01-03 02:25:30 -04:00
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2023-05-24 17:43:17 -03:00
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struct {
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uint16_t period_us;
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uint16_t rate;
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} dshot_rate;
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2023-07-10 06:32:29 -03:00
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// queue of dshot commands that need sending
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ObjectBuffer<page_dshot> dshot_command_queue{8};
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2023-05-24 17:43:17 -03:00
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2021-09-20 10:44:12 -03:00
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struct page_GPIO GPIO;
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2020-07-11 09:22:05 -03:00
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// output mode values
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struct {
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uint16_t mask;
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uint16_t mode;
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} mode_out;
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2021-09-20 10:44:12 -03:00
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2018-01-03 02:25:30 -04:00
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// IMU heater duty cycle
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uint8_t heater_duty_cycle;
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2018-01-16 06:21:59 -04:00
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uint32_t last_servo_out_us;
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2017-12-27 03:24:15 -04:00
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bool corked;
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2018-10-29 18:50:59 -03:00
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bool do_shutdown;
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bool done_shutdown;
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2018-04-14 08:09:11 -03:00
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2018-04-16 19:04:33 -03:00
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bool crc_is_ok;
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2019-04-21 23:54:00 -03:00
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bool detected_io_reset;
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2018-10-30 21:07:47 -03:00
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bool initialised;
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2018-11-01 03:39:24 -03:00
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bool is_chibios_backend;
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2018-10-30 21:07:47 -03:00
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uint32_t protocol_fail_count;
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2019-04-23 20:16:09 -03:00
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uint32_t protocol_count;
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2019-08-13 21:07:48 -03:00
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uint32_t total_errors;
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2019-08-13 21:56:51 -03:00
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uint32_t num_delayed;
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2019-04-23 22:34:20 -03:00
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uint32_t last_iocmu_timestamp_ms;
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2020-01-17 02:36:01 -04:00
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uint32_t read_status_errors;
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uint32_t read_status_ok;
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2020-08-12 23:28:47 -03:00
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uint32_t last_rc_protocols;
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2018-04-16 19:04:33 -03:00
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2018-04-14 08:09:11 -03:00
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// firmware upload
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const char *fw_name = "io_firmware.bin";
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2020-07-11 09:22:05 -03:00
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const char *dshot_fw_name = "io_firmware_dshot.bin";
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2019-10-23 06:58:01 -03:00
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const uint8_t *fw;
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2018-07-09 03:47:35 -03:00
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uint32_t fw_size;
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2018-04-14 08:09:11 -03:00
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2019-08-13 21:07:48 -03:00
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size_t write_wait(const uint8_t *pkt, uint8_t len);
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2018-07-09 03:47:35 -03:00
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bool upload_fw(void);
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2018-04-14 08:09:11 -03:00
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bool recv_byte_with_timeout(uint8_t *c, uint32_t timeout_ms);
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bool recv_bytes(uint8_t *p, uint32_t count);
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void drain(void);
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bool send(uint8_t c);
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bool send(const uint8_t *p, uint32_t count);
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bool get_sync(uint32_t timeout = 40);
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bool sync();
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bool get_info(uint8_t param, uint32_t &val);
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bool erase();
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bool program(uint32_t fw_size);
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bool verify_rev2(uint32_t fw_size);
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bool verify_rev3(uint32_t fw_size_local);
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bool reboot();
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bool check_crc(void);
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2019-04-21 23:54:00 -03:00
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void handle_repeated_failures();
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2019-04-23 22:34:20 -03:00
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void check_iomcu_reset();
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2022-08-07 03:36:42 -03:00
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void write_log(); // handle onboard logging
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2019-11-01 23:32:48 -03:00
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static AP_IOMCU *singleton;
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2018-04-14 08:09:11 -03:00
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enum {
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PROTO_NOP = 0x00,
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PROTO_OK = 0x10,
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PROTO_FAILED = 0x11,
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PROTO_INSYNC = 0x12,
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PROTO_INVALID = 0x13,
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PROTO_BAD_SILICON_REV = 0x14,
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PROTO_EOC = 0x20,
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PROTO_GET_SYNC = 0x21,
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PROTO_GET_DEVICE = 0x22,
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PROTO_CHIP_ERASE = 0x23,
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PROTO_CHIP_VERIFY = 0x24,
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PROTO_PROG_MULTI = 0x27,
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PROTO_READ_MULTI = 0x28,
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PROTO_GET_CRC = 0x29,
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PROTO_GET_OTP = 0x2a,
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PROTO_GET_SN = 0x2b,
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PROTO_GET_CHIP = 0x2c,
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PROTO_SET_DELAY = 0x2d,
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PROTO_GET_CHIP_DES = 0x2e,
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PROTO_REBOOT = 0x30,
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INFO_BL_REV = 1, /**< bootloader protocol revision */
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BL_REV = 5, /**< supported bootloader protocol */
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|
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INFO_BOARD_ID = 2, /**< board type */
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INFO_BOARD_REV = 3, /**< board revision */
|
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|
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INFO_FLASH_SIZE = 4, /**< max firmware size in bytes */
|
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|
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PROG_MULTI_MAX = 248, /**< protocol max is 255, must be multiple of 4 */
|
|
|
|
};
|
2017-12-26 19:03:21 -04:00
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|
|
};
|
2018-01-02 01:47:42 -04:00
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|
|
2019-11-01 23:32:48 -03:00
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|
|
namespace AP {
|
|
|
|
AP_IOMCU *iomcu(void);
|
|
|
|
};
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|
|
|
2018-01-02 01:47:42 -04:00
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|
|
#endif // HAL_WITH_IO_MCU
|