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#pragma once
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2012-08-20 15:37:46 -03:00
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#include <stdint.h>
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#include "AP_HAL_Namespace.h"
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2012-08-20 20:54:01 -03:00
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#include "utility/BetterStream.h"
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2012-08-20 15:37:46 -03:00
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2021-06-05 00:50:05 -03:00
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class ExpandingString;
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2012-08-20 15:37:46 -03:00
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/* Pure virtual UARTDriver class */
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class AP_HAL::UARTDriver : public AP_HAL::BetterStream {
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public:
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UARTDriver() {}
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/* Do not allow copies */
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UARTDriver(const UARTDriver &other) = delete;
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UARTDriver &operator=(const UARTDriver&) = delete;
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2018-06-20 06:00:00 -03:00
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// begin() implicitly clears rx/tx buffers, even if the port was already open (unless the UART is the console UART)
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virtual void begin(uint32_t baud) = 0;
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virtual void begin_locked(uint32_t baud, uint32_t key) { begin(baud); }
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2012-08-23 21:22:46 -03:00
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/// Extended port open method
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///
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/// Allows for both opening with specified buffer sizes, and re-opening
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/// to adjust a subset of the port's settings.
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///
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/// @note Buffer sizes greater than ::_max_buffer_size will be rounded
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/// down.
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///
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/// @param baud Selects the speed that the port will be
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/// configured to. If zero, the port speed is left
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/// unchanged.
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/// @param rxSpace Sets the receive buffer size for the port. If zero
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/// then the buffer size is left unchanged if the port
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/// is open, or set to ::_default_rx_buffer_size if it is
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/// currently closed.
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/// @param txSpace Sets the transmit buffer size for the port. If zero
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/// then the buffer size is left unchanged if the port
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/// is open, or set to ::_default_tx_buffer_size if it
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/// is currently closed.
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///
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virtual void begin(uint32_t baud, uint16_t rxSpace, uint16_t txSpace) = 0;
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virtual void end() = 0;
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virtual void flush() = 0;
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virtual bool is_initialized() = 0;
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virtual void set_blocking_writes(bool blocking) = 0;
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virtual bool tx_pending() = 0;
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// lock a port for exclusive use. Use a key of 0 to unlock
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virtual bool lock_port(uint32_t write_key, uint32_t read_key) { return false; }
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// check data available on a locked port. If port is locked and key is not correct then
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// 0 is returned
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virtual uint32_t available_locked(uint32_t key) { return 0; }
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// write to a locked port. If port is locked and key is not correct then 0 is returned
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// and write is discarded
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virtual size_t write_locked(const uint8_t *buffer, size_t size, uint32_t key) { return 0; }
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// read from a locked port. If port is locked and key is not correct then 0 is returned
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virtual int16_t read_locked(uint32_t key) { return -1; }
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// control optional features
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virtual bool set_options(uint16_t options) { return options==0; }
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virtual uint8_t get_options(void) const { return 0; }
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enum {
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OPTION_RXINV = (1U<<0), // invert RX line
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OPTION_TXINV = (1U<<1), // invert TX line
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OPTION_HDPLEX = (1U<<2), // half-duplex (one-wire) mode
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OPTION_SWAP = (1U<<3), // swap RX and TX pins
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OPTION_PULLDOWN_RX = (1U<<4), // apply pulldown to RX
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OPTION_PULLUP_RX = (1U<<5), // apply pullup to RX
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OPTION_PULLDOWN_TX = (1U<<6), // apply pulldown to TX
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OPTION_PULLUP_TX = (1U<<7), // apply pullup to TX
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OPTION_NODMA_RX = (1U<<8), // don't use DMA for RX
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OPTION_NODMA_TX = (1U<<9), // don't use DMA for TX
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OPTION_MAVLINK_NO_FORWARD = (1U<<10), // don't forward MAVLink data to or from this device
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OPTION_NOFIFO = (1U<<11), // disable hardware FIFO
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};
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enum flow_control {
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FLOW_CONTROL_DISABLE=0, FLOW_CONTROL_ENABLE=1, FLOW_CONTROL_AUTO=2
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};
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virtual void set_flow_control(enum flow_control flow_control_setting) {};
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virtual enum flow_control get_flow_control(void) { return FLOW_CONTROL_DISABLE; }
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2017-11-22 13:38:34 -04:00
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virtual void configure_parity(uint8_t v){};
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virtual void set_stop_bits(int n){};
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/* unbuffered writes bypass the ringbuffer and go straight to the
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* file descriptor
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*/
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virtual bool set_unbuffered_writes(bool on){ return false; };
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2018-01-05 03:07:23 -04:00
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/*
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wait for at least n bytes of incoming data, with timeout in
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milliseconds. Return true if n bytes are available, false if
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timeout
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*/
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virtual bool wait_timeout(uint16_t n, uint32_t timeout_ms) { return false; }
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2018-01-21 15:44:53 -04:00
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/*
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* Optional method to control the update of the motors. Derived classes
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* can implement it if their HAL layer requires.
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*/
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virtual void _timer_tick(void) { }
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2018-05-15 21:42:14 -03:00
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/*
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return timestamp estimate in microseconds for when the start of
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a nbytes packet arrived on the uart. This should be treated as a
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time constraint, not an exact time. It is guaranteed that the
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packet did not start being received after this time, but it
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could have been in a system buffer before the returned time.
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This takes account of the baudrate of the link. For transports
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that have no baudrate (such as USB) the time estimate may be
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less accurate.
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A return value of zero means the HAL does not support this API
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*/
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virtual uint64_t receive_time_constraint_us(uint16_t nbytes) { return 0; }
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virtual uint32_t bw_in_kilobytes_per_second() const {
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return 57;
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}
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2021-05-01 09:00:36 -03:00
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/*
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return true if this UART has DMA enabled on both RX and TX
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*/
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virtual bool is_dma_enabled() const { return false; }
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// request information on uart I/O for this uart, for @SYS/uarts.txt
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virtual void uart_info(ExpandingString &str) {}
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2021-07-08 03:35:06 -03:00
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/*
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software control of the CTS/RTS pins if available. Return false if
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not available
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*/
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virtual bool set_RTS_pin(bool high) { return false; };
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virtual bool set_CTS_pin(bool high) { return false; };
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2021-07-10 15:17:27 -03:00
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// return true requested baud on USB port
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virtual uint32_t get_usb_baud(void) const { return 0; }
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2012-08-20 20:54:01 -03:00
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};
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