forked from rrcarlosr/Jetpack
dchvs
75c7968d30
Jetson Xavier NX, Jetson TX2 Series, Jetson AGX Xavier Series, Jetson Nano, Jetson TX1 [L4T 32.4.4]
36 lines
876 B
C
36 lines
876 B
C
#ifndef __ASM_SH_HW_IRQ_H
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#define __ASM_SH_HW_IRQ_H
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#include <linux/init.h>
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#include <linux/sh_intc.h>
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#include <linux/atomic.h>
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extern atomic_t irq_err_count;
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struct ipr_data {
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unsigned char irq;
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unsigned char ipr_idx; /* Index for the IPR registered */
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unsigned char shift; /* Number of bits to shift the data */
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unsigned char priority; /* The priority */
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};
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struct ipr_desc {
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unsigned long *ipr_offsets;
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unsigned int nr_offsets;
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struct ipr_data *ipr_data;
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unsigned int nr_irqs;
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struct irq_chip chip;
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};
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void register_ipr_controller(struct ipr_desc *);
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void __init plat_irq_setup(void);
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void __init plat_irq_setup_sh3(void);
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void __init plat_irq_setup_pins(int mode);
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enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210,
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IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK,
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IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 };
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#endif /* __ASM_SH_HW_IRQ_H */
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