forked from rrcarlosr/Jetpack
212 lines
6.4 KiB
Plaintext
212 lines
6.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Device-tree overlay for tegra194-p2888-0001-p2822-0000 40-pin
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* Expansion Header.
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*
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* Copyright (c) 2019 NVIDIA CORPORATION. All rights reserved.
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*
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*/
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/pinctrl/pinctrl-tegra.h>
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#include <dt-common/jetson/tegra194-p2888-0001-p2822-0000.h>
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/ {
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overlay-name = "Jetson 40pin Header";
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compatible = JETSON_COMPATIBLE;
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fragment@0 {
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target = <&pinmux>;
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__overlay__ {
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pinctrl-names = "default";
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pinctrl-0 = <&hdr40_pinmux>;
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hdr40_pinmux: header-40pin-pinmux {
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pin7 {
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nvidia,pins = "soc_gpio42_pq6";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
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nvidia,lpdr = <TEGRA_PIN_DISABLE>;
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};
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pin8 {
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nvidia,pins = "uart1_tx_pr2";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
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nvidia,lpdr = <TEGRA_PIN_DISABLE>;
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};
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pin10 {
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nvidia,pins = "uart1_rx_pr3";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
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nvidia,lpdr = <TEGRA_PIN_DISABLE>;
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};
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pin11 {
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nvidia,pins = "uart1_rts_pr4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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nvidia,lpdr = <TEGRA_PIN_DISABLE>;
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};
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pin12 {
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nvidia,pins = "dap2_sclk_ph7";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,lpdr = <TEGRA_PIN_DISABLE>;
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};
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pin13 {
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nvidia,pins = "soc_gpio44_pr0";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
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nvidia,lpdr = <TEGRA_PIN_DISABLE>;
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};
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pin15 {
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nvidia,pins = "soc_gpio54_pn1";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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nvidia,lpdr = <TEGRA_PIN_DISABLE>;
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};
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pin16 {
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nvidia,pins = "can1_stb_pbb0";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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pin18 {
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nvidia,pins = "soc_gpio12_ph0";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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nvidia,lpdr = <TEGRA_PIN_DISABLE>;
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};
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pin19 {
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nvidia,pins = "spi1_mosi_pz5";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,lpdr = <TEGRA_PIN_DISABLE>;
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};
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pin21 {
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nvidia,pins = "spi1_miso_pz4";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,lpdr = <TEGRA_PIN_DISABLE>;
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};
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pin22 {
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nvidia,pins = "soc_gpio21_pq1";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,lpdr = <TEGRA_PIN_DISABLE>;
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};
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pin23 {
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nvidia,pins = "spi1_sck_pz3";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,lpdr = <TEGRA_PIN_DISABLE>;
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};
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pin24 {
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nvidia,pins = "spi1_cs0_pz6";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,lpdr = <TEGRA_PIN_DISABLE>;
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};
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pin26 {
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nvidia,pins = "spi1_cs1_pz7";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,lpdr = <TEGRA_PIN_DISABLE>;
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};
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pin27 {
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nvidia,pins = "gen2_i2c_sda_pdd0";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
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nvidia,lpdr = <TEGRA_PIN_DISABLE>;
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};
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pin28 {
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nvidia,pins = "gen2_i2c_scl_pcc7";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
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nvidia,lpdr = <TEGRA_PIN_DISABLE>;
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};
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pin29 {
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nvidia,pins = "can0_din_paa3";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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pin31 {
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nvidia,pins = "can0_dout_paa2";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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pin32 {
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nvidia,pins = "can1_en_pbb1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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pin33 {
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nvidia,pins = "can1_dout_paa0";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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pin35 {
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nvidia,pins = "dap2_fs_pi2";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,lpdr = <TEGRA_PIN_DISABLE>;
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};
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pin36 {
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nvidia,pins = "uart1_cts_pr5";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,lpdr = <TEGRA_PIN_DISABLE>;
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};
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pin37 {
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nvidia,pins = "can1_din_paa1";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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pin38 {
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nvidia,pins = "dap2_din_pi1";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,lpdr = <TEGRA_PIN_DISABLE>;
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};
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pin40 {
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nvidia,pins = "dap2_dout_pi0";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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nvidia,lpdr = <TEGRA_PIN_DISABLE>;
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};
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};
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};
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};
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};
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