forked from rrcarlosr/Jetpack
88 lines
2.7 KiB
C
88 lines
2.7 KiB
C
/*
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* This header provides macros for ams AS3722 device bindings.
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*
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* Copyright (c) 2013, NVIDIA Corporation.
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*
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* Author: Laxman Dewangan <ldewangan@nvidia.com>
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*
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*/
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#ifndef __DT_BINDINGS_AS3722_H__
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#define __DT_BINDINGS_AS3722_H__
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/* External control pins */
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#define AS3722_EXT_CONTROL_PIN_ENABLE1 1
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#define AS3722_EXT_CONTROL_PIN_ENABLE2 2
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#define AS3722_EXT_CONTROL_PIN_ENABLE3 3
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#define AS3722_BBCCUR_50UA 0
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#define AS3722_BBCCUR_200UA 1
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#define AS3722_BBCCUR_100UA 2
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#define AS3722_BBCCUR_400UA 3
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#define AS3722_BBCRESOFF_ENABLE 0
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#define AS3722_BBCRESOFF_BYPASS 1
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#define AS3722_BBCMODE_OFF 0
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#define AS3722_BBCMODE_ACTIVE 1
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#define AS3722_BBCMODE_ACT_STBY 2
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#define AS3722_BBCMODE_ACT_STBY_OFF 3
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/* Interrupt numbers for AS3722 */
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#define AS3722_IRQ_LID 0
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#define AS3722_IRQ_ACOK 1
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#define AS3722_IRQ_ENABLE1 2
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#define AS3722_IRQ_OCCUR_ALARM_SD0 3
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#define AS3722_IRQ_ONKEY_LONG_PRESS 4
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#define AS3722_IRQ_ONKEY 5
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#define AS3722_IRQ_OVTMP 6
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#define AS3722_IRQ_LOWBAT 7
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#define AS3722_IRQ_SD0_LV 8
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#define AS3722_IRQ_SD1_LV 9
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#define AS3722_IRQ_SD2_LV 10
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#define AS3722_IRQ_PWM1_OV_PROT 11
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#define AS3722_IRQ_PWM2_OV_PROT 12
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#define AS3722_IRQ_ENABLE2 13
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#define AS3722_IRQ_SD6_LV 14
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#define AS3722_IRQ_RTC_REP 15
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#define AS3722_IRQ_RTC_ALARM 16
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#define AS3722_IRQ_GPIO1 17
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#define AS3722_IRQ_GPIO2 18
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#define AS3722_IRQ_GPIO3 19
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#define AS3722_IRQ_GPIO4 20
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#define AS3722_IRQ_GPIO5 21
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#define AS3722_IRQ_WATCHDOG 22
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#define AS3722_IRQ_ENABLE3 23
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#define AS3722_IRQ_TEMP_SD0_SHUTDOWN 24
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#define AS3722_IRQ_TEMP_SD1_SHUTDOWN 25
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#define AS3722_IRQ_TEMP_SD2_SHUTDOWN 26
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#define AS3722_IRQ_TEMP_SD0_ALARM 27
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#define AS3722_IRQ_TEMP_SD1_ALARM 28
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#define AS3722_IRQ_TEMP_SD6_ALARM 29
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#define AS3722_IRQ_OCCUR_ALARM_SD6 30
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#define AS3722_IRQ_ADC 31
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/* Power Good OC Mask macro */
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#define AS3722_OC_PG_MASK_AC_OK 0x1
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#define AS3722_OC_PG_MASK_GPIO3 0x2
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#define AS3722_OC_PG_MASK_GPIO4 0x4
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#define AS3722_OC_PG_MASK_GPIO5 0x8
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#define AS3722_OC_PG_MASK_PWRGOOD_SD0 0x10
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#define AS3722_OC_PG_MASK_OVCURR_SD0 0x20
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#define AS3722_OC_PG_MASK_POWERGOOD_SD6 0x40
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#define AS3722_OC_PG_MASK_OVCURR_SD6 0x80
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/* Thermal sensor zones */
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#define AS3722_SD0_SENSOR 0
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#define AS3722_SD1_SENSOR 1
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#define AS3722_SD6_SENSOR 2
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/* SDx temperature ADC channel */
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#define AS3722_TEMP1_SD0 16
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#define AS3722_TEMP2_SD0 17
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#define AS3722_TEMP3_SD0 18
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#define AS3722_TEMP4_SD0 19
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#define AS3722_TEMP_SD1 20
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#define AS3722_TEMP1_SD6 21
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#define AS3722_TEMP2_SD6 22
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#endif /* __DT_BINDINGS_AS3722_H__ */
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