forked from rrcarlosr/Jetpack
1241 lines
56 KiB
Plaintext
1241 lines
56 KiB
Plaintext
/*
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* Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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*/
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/*
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* tegra194-soc-prod.dtsi: soc specific Prod configuration.
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* Generation date: 2017-12-11 11:48
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* PLEASE DO NOT EDIT THIS FILE MANUALLY
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* This file is autogenerated using the script gen_prod_dtsi.py V1.3
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* NOTE: Do not use file as is. Copy the relevant section to existing file in tree.
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* NOTE: FIXME nodes indicate nodes corresponding to Golden Register were not found in input DTB.
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* Please check if DTB has the nodes enabled and register address in GR DB is valid.
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*/
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/ {
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host1x {
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prod-settings {
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#prod-cells = <4>;
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prod {
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prod = <
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1 0x000022e4 0x0000ffff 0x00000808>; //HOST1X_THOST_COMMON_CDMA_ASM_TIMEOUT_0
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};
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};
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se@15810000 {
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prod-settings {
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#prod-cells = <4>;
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prod {
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prod = <
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0 0x00000018 0x00020002 0x00000000>; //SE1_SE_SECURITY_0
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};
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};
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};
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se@15820000 {
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prod-settings {
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#prod-cells = <4>;
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prod {
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prod = <
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0 0x00000018 0x00020002 0x00000000>; //SE2_SE_SECURITY_0
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};
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};
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};
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se@15830000 {
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prod-settings {
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#prod-cells = <4>;
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prod {
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prod = <
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0 0x00000018 0x00020002 0x00000000>; //SE3_SE_SECURITY_0
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};
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};
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};
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se@15840000 {
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prod-settings {
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#prod-cells = <4>;
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prod {
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prod = <
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0 0x00000018 0x00020002 0x00000000>; //SE4_SE_SECURITY_0
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};
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};
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};
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sor {
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prod-settings {
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#prod-cells = <4>;
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prod_list_hdmi_soc = "prod_c_hdmi_0m_54m","prod_c_hdmi_54m_111m","prod_c_hdmi_111m_223m","prod_c_hdmi_223m_300m","prod_c_hdmi_300m_600m";
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prod_c_dp {
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prod = <
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0 0x00000180 0x00000001 0x00000001 //SOR_NV_PDISP_SOR_DP_SPARE0_0 00:00=SEQ_ENABLE 0x1
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0 0x000005a4 0x0f0f0f00 0x05050300 //SOR_NV_PDISP_SOR_PLL0_0 27:24=ICHPMP 0x5
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// 19:16=FILTER 0x5
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// 11:08=VCOCAP 0x3
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0 0x000005a8 0x00000100 0x00000100 //SOR_NV_PDISP_SOR_PLL1_0 08:08=TMDS_TERM 0x1
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0 0x000005ac 0xf000ff00 0x00000000 //SOR_NV_PDISP_SOR_PLL2_0 31:28=PLL_MDIV 0x0
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// 15:08=PLL_NDIV 0x0
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0 0x000005b0 0x00000ff0 0x00000440 //SOR_NV_PDISP_SOR_PLL3_0 11:08=AVDD10_LEVEL 0x4
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// 07:04=AVDD14_LEVEL 0x4
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0 0x000005b4 0x00400000 0x00000000 //SOR_NV_PDISP_SOR_PLL4_0 22:22=ENB_LCKDET 0x0
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0 0x000005e4 0x00003b80 0x00001a00>; //SOR_NV_PDISP_SOR_PLL5_0 13:11=PLL_SEL_TIMER 0x3
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// 09:07=PLL_LOCKDET2_SETUPN 0x4
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};
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prod_c_rbr {
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prod = <
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0 0x000005a8 0x00f00000 0x00200000>; //SOR_NV_PDISP_SOR_PLL1_0 23:20=LOADADJ 0x2
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};
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prod_c_hbr {
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prod = <
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0 0x000005a8 0x00f00000 0x00200000>; //SOR_NV_PDISP_SOR_PLL1_0 23:20=LOADADJ 0x2
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};
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prod_c_hbr2 {
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prod = <
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0 0x000005a8 0x00f00000 0x00300000>; //SOR_NV_PDISP_SOR_PLL1_0 23:20=LOADADJ 0x3
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};
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prod_c_hbr3 {
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prod = <
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0 0x000005a8 0x00f00000 0x00300000>; //SOR_NV_PDISP_SOR_PLL1_0 23:20=LOADADJ 0x3
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};
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prod_c_hdmi_0m_54m {
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prod = <
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0 0x000005a4 0x0f0f0f00 0x05050000 //SOR_NV_PDISP_SOR_PLL0
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0 0x000005a8 0x00f00100 0x00300100 //SOR_NV_PDISP_SOR_PLL1
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0 0x000005b0 0xff000ff0 0x38000440 //SOR_NV_PDISP_SOR_PLL3
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0 0x000005e4 0x00003f80 0x00002a00 //SOR_NV_PDISP_SOR_PLL5_0
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0 0x00000138 0xffffffff 0x333a3a3a //SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
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0 0x00000148 0xffffffff 0x00000000 //SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
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0 0x000005b8 0x0040ff00 0x00400000>; //SOR_NV_PDISP_SOR_DP_PADCTL0
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};
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prod_c_hdmi_54m_111m {
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prod = <
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0 0x000005a4 0x0f0f0f00 0x05050100 //SOR_NV_PDISP_SOR_PLL0
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0 0x000005a8 0x00f00100 0x00300100 //SOR_NV_PDISP_SOR_PLL1
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0 0x000005b0 0xff000ff0 0x38000440 //SOR_NV_PDISP_SOR_PLL3
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0 0x000005e4 0x00003f80 0x00002200 //SOR_NV_PDISP_SOR_PLL5_0
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0 0x00000138 0xffffffff 0x333a3a3a //SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
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0 0x00000148 0xffffffff 0x00000000 //SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
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0 0x000005b8 0x0040ff00 0x00400000>; //SOR_NV_PDISP_SOR_DP_PADCTL0
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};
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prod_c_hdmi_111m_223m {
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prod = <
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0 0x000005a4 0x0f0f0f00 0x05050300 //SOR_NV_PDISP_SOR_PLL0
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0 0x000005a8 0x00f00100 0x00300100 //SOR_NV_PDISP_SOR_PLL1
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0 0x000005b0 0xff000ff0 0x38000440 //SOR_NV_PDISP_SOR_PLL3
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0 0x000005e4 0x00003f80 0x00001a00 //SOR_NV_PDISP_SOR_PLL5_0
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0 0x00000138 0xffffffff 0x373a3a3a //SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
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0 0x00000148 0xffffffff 0x00000000 //SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
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0 0x000005b8 0x0040ff00 0x00400000>; //SOR_NV_PDISP_SOR_DP_PADCTL0
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};
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prod_c_hdmi_223m_300m {
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prod = <
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0 0x000005a4 0x0f0f0f00 0x05050300 //SOR_NV_PDISP_SOR_PLL0
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0 0x000005a8 0x00f00100 0x00300100 //SOR_NV_PDISP_SOR_PLL1
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0 0x000005b0 0xff000ff0 0x38000440 //SOR_NV_PDISP_SOR_PLL3
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0 0x000005e4 0x00003f80 0x00001a00 //SOR_NV_PDISP_SOR_PLL5_0
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0 0x00000138 0xffffffff 0x333d3d3d //SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
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0 0x00000148 0xffffffff 0x00000000 //SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
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0 0x000005b8 0x0040ff00 0x00404000>; //SOR_NV_PDISP_SOR_DP_PADCTL0
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};
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prod_c_hdmi_300m_600m {
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prod = <
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0 0x000005a4 0x0f0f0f00 0x05050300 //SOR_NV_PDISP_SOR_PLL0
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0 0x000005a8 0x00f00100 0x00300100 //SOR_NV_PDISP_SOR_PLL1
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0 0x000005b0 0xff000ff0 0x38000440 //SOR_NV_PDISP_SOR_PLL3
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0 0x000005e4 0x00003f80 0x00001a00 //SOR_NV_PDISP_SOR_PLL5_0
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0 0x00000138 0xffffffff 0x333d3d3d //SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
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0 0x00000148 0xffffffff 0x00000000 //SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
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0 0x000005b8 0x0040ff00 0x00406000>; //SOR_NV_PDISP_SOR_DP_PADCTL0
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};
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};
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};
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sor1 {
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prod-settings {
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#prod-cells = <4>;
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prod_list_hdmi_soc = "prod_c_hdmi_0m_54m","prod_c_hdmi_54m_111m","prod_c_hdmi_111m_223m","prod_c_hdmi_223m_300m","prod_c_hdmi_300m_600m";
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prod_c_dp {
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prod = <
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0 0x00000180 0x00000001 0x00000001 //SOR_NV_PDISP_SOR_DP_SPARE0_0 00:00=SEQ_ENABLE 0x1
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0 0x000005a4 0x0f0f0f00 0x05050300 //SOR_NV_PDISP_SOR_PLL0_0 27:24=ICHPMP 0x5
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// 19:16=FILTER 0x5
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// 11:08=VCOCAP 0x3
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0 0x000005a8 0x00000100 0x00000100 //SOR_NV_PDISP_SOR_PLL1_0 08:08=TMDS_TERM 0x1
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0 0x000005ac 0xf000ff00 0x00000000 //SOR_NV_PDISP_SOR_PLL2_0 31:28=PLL_MDIV 0x0
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// 15:08=PLL_NDIV 0x0
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0 0x000005b0 0x00000ff0 0x00000440 //SOR_NV_PDISP_SOR_PLL3_0 11:08=AVDD10_LEVEL 0x4
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// 07:04=AVDD14_LEVEL 0x4
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0 0x000005b4 0x00400000 0x00000000 //SOR_NV_PDISP_SOR_PLL4_0 22:22=ENB_LCKDET 0x0
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0 0x000005e4 0x00003b80 0x00001a00>; //SOR_NV_PDISP_SOR_PLL5_0 13:11=PLL_SEL_TIMER 0x3
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// 09:07=PLL_LOCKDET2_SETUPN 0x4
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};
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prod_c_rbr {
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prod = <
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0 0x000005a8 0x00f00000 0x00200000>; //SOR_NV_PDISP_SOR_PLL1_0 23:20=LOADADJ 0x2
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};
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prod_c_hbr {
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prod = <
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0 0x000005a8 0x00f00000 0x00200000>; //SOR_NV_PDISP_SOR_PLL1_0 23:20=LOADADJ 0x2
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};
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prod_c_hbr2 {
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prod = <
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0 0x000005a8 0x00f00000 0x00300000>; //SOR_NV_PDISP_SOR_PLL1_0 23:20=LOADADJ 0x3
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};
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prod_c_hbr3 {
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prod = <
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0 0x000005a8 0x00f00000 0x00300000>; //SOR_NV_PDISP_SOR_PLL1_0 23:20=LOADADJ 0x3
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};
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prod_c_hdmi_0m_54m {
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prod = <
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0 0x000005a4 0x0f0f0f00 0x05050000 //SOR_NV_PDISP_SOR_PLL0
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0 0x000005a8 0x00f00100 0x00300100 //SOR_NV_PDISP_SOR_PLL1
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0 0x000005b0 0xff000ff0 0x38000440 //SOR_NV_PDISP_SOR_PLL3
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0 0x000005e4 0x00003f80 0x00002a00 //SOR_NV_PDISP_SOR_PLL5_0
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0 0x00000138 0xffffffff 0x333a3a3a //SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
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0 0x00000148 0xffffffff 0x00000000 //SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
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0 0x000005b8 0x0040ff00 0x00400000>; //SOR_NV_PDISP_SOR_DP_PADCTL0
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};
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prod_c_hdmi_54m_111m {
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prod = <
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0 0x000005a4 0x0f0f0f00 0x05050100 //SOR_NV_PDISP_SOR_PLL0
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0 0x000005a8 0x00f00100 0x00300100 //SOR_NV_PDISP_SOR_PLL1
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0 0x000005b0 0xff000ff0 0x38000440 //SOR_NV_PDISP_SOR_PLL3
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0 0x000005e4 0x00003f80 0x00002200 //SOR_NV_PDISP_SOR_PLL5_0
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0 0x00000138 0xffffffff 0x333a3a3a //SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
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0 0x00000148 0xffffffff 0x00000000 //SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
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0 0x000005b8 0x0040ff00 0x00400000>; //SOR_NV_PDISP_SOR_DP_PADCTL0
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};
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prod_c_hdmi_111m_223m {
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prod = <
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0 0x000005a4 0x0f0f0f00 0x05050300 //SOR_NV_PDISP_SOR_PLL0
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0 0x000005a8 0x00f00100 0x00300100 //SOR_NV_PDISP_SOR_PLL1
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0 0x000005b0 0xff000ff0 0x38000440 //SOR_NV_PDISP_SOR_PLL3
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0 0x000005e4 0x00003f80 0x00001a00 //SOR_NV_PDISP_SOR_PLL5_0
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0 0x00000138 0xffffffff 0x373a3a3a //SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
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0 0x00000148 0xffffffff 0x00000000 //SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
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0 0x000005b8 0x0040ff00 0x00400000>; //SOR_NV_PDISP_SOR_DP_PADCTL0
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};
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prod_c_hdmi_223m_300m {
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prod = <
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0 0x000005a4 0x0f0f0f00 0x05050300 //SOR_NV_PDISP_SOR_PLL0
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0 0x000005a8 0x00f00100 0x00300100 //SOR_NV_PDISP_SOR_PLL1
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0 0x000005b0 0xff000ff0 0x38000440 //SOR_NV_PDISP_SOR_PLL3
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0 0x000005e4 0x00003f80 0x00001a00 //SOR_NV_PDISP_SOR_PLL5_0
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0 0x00000138 0xffffffff 0x333d3d3d //SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
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0 0x00000148 0xffffffff 0x00000000 //SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
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0 0x000005b8 0x0040ff00 0x00404000>; //SOR_NV_PDISP_SOR_DP_PADCTL0
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};
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prod_c_hdmi_300m_600m {
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prod = <
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0 0x000005a4 0x0f0f0f00 0x05050300 //SOR_NV_PDISP_SOR_PLL0
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0 0x000005a8 0x00f00100 0x00300100 //SOR_NV_PDISP_SOR_PLL1
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0 0x000005b0 0xff000ff0 0x38000440 //SOR_NV_PDISP_SOR_PLL3
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0 0x000005e4 0x00003f80 0x00001a00 //SOR_NV_PDISP_SOR_PLL5_0
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0 0x00000138 0xffffffff 0x333d3d3d //SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
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0 0x00000148 0xffffffff 0x00000000 //SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
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0 0x000005b8 0x0040ff00 0x00406000>; //SOR_NV_PDISP_SOR_DP_PADCTL0
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};
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};
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};
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sor2 {
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prod-settings {
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#prod-cells = <4>;
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prod_list_hdmi_soc = "prod_c_hdmi_0m_54m","prod_c_hdmi_54m_111m","prod_c_hdmi_111m_223m","prod_c_hdmi_223m_300m","prod_c_hdmi_300m_600m";
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prod_c_dp {
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prod = <
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0 0x00000180 0x00000001 0x00000001 //SOR_NV_PDISP_SOR_DP_SPARE0_0 00:00=SEQ_ENABLE 0x1
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0 0x000005a4 0x0f0f0f00 0x05050300 //SOR_NV_PDISP_SOR_PLL0_0 27:24=ICHPMP 0x5
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// 19:16=FILTER 0x5
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// 11:08=VCOCAP 0x3
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0 0x000005a8 0x00000100 0x00000100 //SOR_NV_PDISP_SOR_PLL1_0 08:08=TMDS_TERM 0x1
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0 0x000005ac 0xf000ff00 0x00000000 //SOR_NV_PDISP_SOR_PLL2_0 31:28=PLL_MDIV 0x0
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// 15:08=PLL_NDIV 0x0
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0 0x000005b0 0x00000ff0 0x00000440 //SOR_NV_PDISP_SOR_PLL3_0 11:08=AVDD10_LEVEL 0x4
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// 07:04=AVDD14_LEVEL 0x4
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0 0x000005b4 0x00400000 0x00000000 //SOR_NV_PDISP_SOR_PLL4_0 22:22=ENB_LCKDET 0x0
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0 0x000005e4 0x00003b80 0x00001a00>; //SOR_NV_PDISP_SOR_PLL5_0 13:11=PLL_SEL_TIMER 0x3
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// 09:07=PLL_LOCKDET2_SETUPN 0x4
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};
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prod_c_rbr {
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prod = <
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0 0x000005a8 0x00f00000 0x00200000>; //SOR_NV_PDISP_SOR_PLL1_0 23:20=LOADADJ 0x2
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};
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prod_c_hbr {
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prod = <
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0 0x000005a8 0x00f00000 0x00200000>; //SOR_NV_PDISP_SOR_PLL1_0 23:20=LOADADJ 0x2
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};
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prod_c_hbr2 {
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prod = <
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0 0x000005a8 0x00f00000 0x00300000>; //SOR_NV_PDISP_SOR_PLL1_0 23:20=LOADADJ 0x3
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};
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prod_c_hbr3 {
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prod = <
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0 0x000005a8 0x00f00000 0x00300000>; //SOR_NV_PDISP_SOR_PLL1_0 23:20=LOADADJ 0x3
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};
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prod_c_hdmi_0m_54m {
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prod = <
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0 0x000005a4 0x0f0f0f00 0x05050000 //SOR_NV_PDISP_SOR_PLL0
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0 0x000005a8 0x00f00100 0x00300100 //SOR_NV_PDISP_SOR_PLL1
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0 0x000005b0 0xff000ff0 0x38000440 //SOR_NV_PDISP_SOR_PLL3
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0 0x000005e4 0x00003f80 0x00002a00 //SOR_NV_PDISP_SOR_PLL5_0
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0 0x00000138 0xffffffff 0x333a3a3a //SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
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0 0x00000148 0xffffffff 0x00000000 //SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
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0 0x000005b8 0x0040ff00 0x00400000>; //SOR_NV_PDISP_SOR_DP_PADCTL0
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};
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prod_c_hdmi_54m_111m {
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prod = <
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0 0x000005a4 0x0f0f0f00 0x05050100 //SOR_NV_PDISP_SOR_PLL0
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0 0x000005a8 0x00f00100 0x00300100 //SOR_NV_PDISP_SOR_PLL1
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0 0x000005b0 0xff000ff0 0x38000440 //SOR_NV_PDISP_SOR_PLL3
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0 0x000005e4 0x00003f80 0x00002200 //SOR_NV_PDISP_SOR_PLL5_0
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0 0x00000138 0xffffffff 0x333a3a3a //SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
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0 0x00000148 0xffffffff 0x00000000 //SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
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0 0x000005b8 0x0040ff00 0x00400000>; //SOR_NV_PDISP_SOR_DP_PADCTL0
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};
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prod_c_hdmi_111m_223m {
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prod = <
|
|
0 0x000005a4 0x0f0f0f00 0x05050300 //SOR_NV_PDISP_SOR_PLL0
|
|
0 0x000005a8 0x00f00100 0x00300100 //SOR_NV_PDISP_SOR_PLL1
|
|
0 0x000005b0 0xff000ff0 0x38000440 //SOR_NV_PDISP_SOR_PLL3
|
|
0 0x000005e4 0x00003f80 0x00001a00 //SOR_NV_PDISP_SOR_PLL5_0
|
|
0 0x00000138 0xffffffff 0x373a3a3a //SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
|
|
0 0x00000148 0xffffffff 0x00000000 //SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
|
|
0 0x000005b8 0x0040ff00 0x00400000>; //SOR_NV_PDISP_SOR_DP_PADCTL0
|
|
};
|
|
prod_c_hdmi_223m_300m {
|
|
prod = <
|
|
0 0x000005a4 0x0f0f0f00 0x05050300 //SOR_NV_PDISP_SOR_PLL0
|
|
0 0x000005a8 0x00f00100 0x00300100 //SOR_NV_PDISP_SOR_PLL1
|
|
0 0x000005b0 0xff000ff0 0x38000440 //SOR_NV_PDISP_SOR_PLL3
|
|
0 0x000005e4 0x00003f80 0x00001a00 //SOR_NV_PDISP_SOR_PLL5_0
|
|
0 0x00000138 0xffffffff 0x333d3d3d //SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
|
|
0 0x00000148 0xffffffff 0x00000000 //SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
|
|
0 0x000005b8 0x0040ff00 0x00404000>; //SOR_NV_PDISP_SOR_DP_PADCTL0
|
|
};
|
|
prod_c_hdmi_300m_600m {
|
|
prod = <
|
|
0 0x000005a4 0x0f0f0f00 0x05050300 //SOR_NV_PDISP_SOR_PLL0
|
|
0 0x000005a8 0x00f00100 0x00300100 //SOR_NV_PDISP_SOR_PLL1
|
|
0 0x000005b0 0xff000ff0 0x38000440 //SOR_NV_PDISP_SOR_PLL3
|
|
0 0x000005e4 0x00003f80 0x00001a00 //SOR_NV_PDISP_SOR_PLL5_0
|
|
0 0x00000138 0xffffffff 0x333d3d3d //SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
|
|
0 0x00000148 0xffffffff 0x00000000 //SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
|
|
0 0x000005b8 0x0040ff00 0x00406000>; //SOR_NV_PDISP_SOR_DP_PADCTL0
|
|
};
|
|
};
|
|
};
|
|
|
|
sor3 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod_list_hdmi_soc = "prod_c_hdmi_0m_54m","prod_c_hdmi_54m_111m","prod_c_hdmi_111m_223m","prod_c_hdmi_223m_300m","prod_c_hdmi_300m_600m";
|
|
prod_c_dp {
|
|
prod = <
|
|
0 0x00000180 0x00000001 0x00000001 //SOR_NV_PDISP_SOR_DP_SPARE0_0 00:00=SEQ_ENABLE 0x1
|
|
0 0x000005a4 0x0f0f0f00 0x05050300 //SOR_NV_PDISP_SOR_PLL0_0 27:24=ICHPMP 0x5
|
|
// 19:16=FILTER 0x5
|
|
// 11:08=VCOCAP 0x3
|
|
0 0x000005a8 0x00000100 0x00000100 //SOR_NV_PDISP_SOR_PLL1_0 08:08=TMDS_TERM 0x1
|
|
0 0x000005ac 0xf000ff00 0x00000000 //SOR_NV_PDISP_SOR_PLL2_0 31:28=PLL_MDIV 0x0
|
|
// 15:08=PLL_NDIV 0x0
|
|
0 0x000005b0 0x00000ff0 0x00000440 //SOR_NV_PDISP_SOR_PLL3_0 11:08=AVDD10_LEVEL 0x4
|
|
// 07:04=AVDD14_LEVEL 0x4
|
|
0 0x000005b4 0x00400000 0x00000000 //SOR_NV_PDISP_SOR_PLL4_0 22:22=ENB_LCKDET 0x0
|
|
0 0x000005e4 0x00003b80 0x00001a00>; //SOR_NV_PDISP_SOR_PLL5_0 13:11=PLL_SEL_TIMER 0x3
|
|
// 09:07=PLL_LOCKDET2_SETUPN 0x4
|
|
};
|
|
prod_c_rbr {
|
|
prod = <
|
|
0 0x000005a8 0x00f00000 0x00200000>; //SOR_NV_PDISP_SOR_PLL1_0 23:20=LOADADJ 0x2
|
|
};
|
|
prod_c_hbr {
|
|
prod = <
|
|
0 0x000005a8 0x00f00000 0x00200000>; //SOR_NV_PDISP_SOR_PLL1_0 23:20=LOADADJ 0x2
|
|
};
|
|
prod_c_hbr2 {
|
|
prod = <
|
|
0 0x000005a8 0x00f00000 0x00300000>; //SOR_NV_PDISP_SOR_PLL1_0 23:20=LOADADJ 0x3
|
|
};
|
|
prod_c_hbr3 {
|
|
prod = <
|
|
0 0x000005a8 0x00f00000 0x00300000>; //SOR_NV_PDISP_SOR_PLL1_0 23:20=LOADADJ 0x3
|
|
};
|
|
prod_c_hdmi_0m_54m {
|
|
prod = <
|
|
0 0x000005a4 0x0f0f0f00 0x05050000 //SOR_NV_PDISP_SOR_PLL0
|
|
0 0x000005a8 0x00f00100 0x00300100 //SOR_NV_PDISP_SOR_PLL1
|
|
0 0x000005b0 0xff000ff0 0x38000440 //SOR_NV_PDISP_SOR_PLL3
|
|
0 0x000005e4 0x00003f80 0x00002a00 //SOR_NV_PDISP_SOR_PLL5_0
|
|
0 0x00000138 0xffffffff 0x333a3a3a //SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
|
|
0 0x00000148 0xffffffff 0x00000000 //SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
|
|
0 0x000005b8 0x0040ff00 0x00400000>; //SOR_NV_PDISP_SOR_DP_PADCTL0
|
|
};
|
|
prod_c_hdmi_54m_111m {
|
|
prod = <
|
|
0 0x000005a4 0x0f0f0f00 0x05050100 //SOR_NV_PDISP_SOR_PLL0
|
|
0 0x000005a8 0x00f00100 0x00300100 //SOR_NV_PDISP_SOR_PLL1
|
|
0 0x000005b0 0xff000ff0 0x38000440 //SOR_NV_PDISP_SOR_PLL3
|
|
0 0x000005e4 0x00003f80 0x00002200 //SOR_NV_PDISP_SOR_PLL5_0
|
|
0 0x00000138 0xffffffff 0x333a3a3a //SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
|
|
0 0x00000148 0xffffffff 0x00000000 //SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
|
|
0 0x000005b8 0x0040ff00 0x00400000>; //SOR_NV_PDISP_SOR_DP_PADCTL0
|
|
};
|
|
prod_c_hdmi_111m_223m {
|
|
prod = <
|
|
0 0x000005a4 0x0f0f0f00 0x05050300 //SOR_NV_PDISP_SOR_PLL0
|
|
0 0x000005a8 0x00f00100 0x00300100 //SOR_NV_PDISP_SOR_PLL1
|
|
0 0x000005b0 0xff000ff0 0x38000440 //SOR_NV_PDISP_SOR_PLL3
|
|
0 0x000005e4 0x00003f80 0x00001a00 //SOR_NV_PDISP_SOR_PLL5_0
|
|
0 0x00000138 0xffffffff 0x373a3a3a //SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
|
|
0 0x00000148 0xffffffff 0x00000000 //SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
|
|
0 0x000005b8 0x0040ff00 0x00400000>; //SOR_NV_PDISP_SOR_DP_PADCTL0
|
|
};
|
|
prod_c_hdmi_223m_300m {
|
|
prod = <
|
|
0 0x000005a4 0x0f0f0f00 0x05050300 //SOR_NV_PDISP_SOR_PLL0
|
|
0 0x000005a8 0x00f00100 0x00300100 //SOR_NV_PDISP_SOR_PLL1
|
|
0 0x000005b0 0xff000ff0 0x38000440 //SOR_NV_PDISP_SOR_PLL3
|
|
0 0x000005e4 0x00003f80 0x00001a00 //SOR_NV_PDISP_SOR_PLL5_0
|
|
0 0x00000138 0xffffffff 0x333d3d3d //SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
|
|
0 0x00000148 0xffffffff 0x00000000 //SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
|
|
0 0x000005b8 0x0040ff00 0x00404000>; //SOR_NV_PDISP_SOR_DP_PADCTL0
|
|
};
|
|
prod_c_hdmi_300m_600m {
|
|
prod = <
|
|
0 0x000005a4 0x0f0f0f00 0x05050300 //SOR_NV_PDISP_SOR_PLL0
|
|
0 0x000005a8 0x00f00100 0x00300100 //SOR_NV_PDISP_SOR_PLL1
|
|
0 0x000005b0 0xff000ff0 0x38000440 //SOR_NV_PDISP_SOR_PLL3
|
|
0 0x000005e4 0x00003f80 0x00001a00 //SOR_NV_PDISP_SOR_PLL5_0
|
|
0 0x00000138 0xffffffff 0x333d3d3d //SOR_NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0
|
|
0 0x00000148 0xffffffff 0x00000000 //SOR_NV_PDISP_SOR_LANE_PREEMPHASIS0_0
|
|
0 0x000005b8 0x0040ff00 0x00406000>; //SOR_NV_PDISP_SOR_DP_PADCTL0
|
|
};
|
|
};
|
|
};
|
|
|
|
dpaux@155c0000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod_c_dpaux_hdmi {
|
|
prod = <
|
|
0 0x00000124 0x000037fc 0x00000700
|
|
>;
|
|
};
|
|
prod_c_dpaux_dp {
|
|
prod = <
|
|
0 0x00000124 0x000037fe 0x000024b2 //DPAUX_HYBRID_PADCTL_0 13:12=AUX_CMH 0x02
|
|
// 10:08=AUX_DRVZ 0x04
|
|
// 07:02=AUX_DRVI 0x2c
|
|
// 01:01=AUX_INPUT_RCV 0x01
|
|
>;
|
|
};
|
|
};
|
|
};
|
|
|
|
dpaux@155D0000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod_c_dpaux_hdmi {
|
|
prod = <
|
|
0 0x00000124 0x000037fc 0x00000700
|
|
>;
|
|
};
|
|
prod_c_dpaux_dp {
|
|
prod = <
|
|
0 0x00000124 0x000037fe 0x000024b2 //DPAUX_HYBRID_PADCTL_0 13:12=AUX_CMH 0x02
|
|
// 10:08=AUX_DRVZ 0x04
|
|
// 07:02=AUX_DRVI 0x2c
|
|
// 01:01=AUX_INPUT_RCV 0x01
|
|
>;
|
|
};
|
|
};
|
|
};
|
|
|
|
dpaux@155E0000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod_c_dpaux_hdmi {
|
|
prod = <
|
|
0 0x00000124 0x000037fc 0x00000700
|
|
>;
|
|
};
|
|
prod_c_dpaux_dp {
|
|
prod = <
|
|
0 0x00000124 0x000037fe 0x000024b2 //DPAUX_HYBRID_PADCTL_0 13:12=AUX_CMH 0x02
|
|
// 10:08=AUX_DRVZ 0x04
|
|
// 07:02=AUX_DRVI 0x2c
|
|
// 01:01=AUX_INPUT_RCV 0x01
|
|
>;
|
|
};
|
|
};
|
|
};
|
|
|
|
dpaux@155F0000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod_c_dpaux_hdmi {
|
|
prod = <
|
|
0 0x00000124 0x000037fc 0x00000700
|
|
>;
|
|
};
|
|
prod_c_dpaux_dp {
|
|
prod = <
|
|
0 0x00000124 0x000037fe 0x000024b2 //DPAUX_HYBRID_PADCTL_0 13:12=AUX_CMH 0x02
|
|
// 10:08=AUX_DRVZ 0x04
|
|
// 07:02=AUX_DRVI 0x2c
|
|
// 01:01=AUX_INPUT_RCV 0x01
|
|
>;
|
|
};
|
|
};
|
|
};
|
|
|
|
nvcsi@15a00000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod {
|
|
prod = <
|
|
0 0x00011018 0x00070000 0x00020000 //NVCSI_PHY_0_NVCSI_CIL_PAD_CONFIG_0
|
|
0 0x0001109c 0xe000e000 0xc000c000 //NVCSI_PHY_0_NVCSI_CIL_A_CPHY_CALIB_CTRL_0
|
|
0 0x000110a8 0x0000fefe 0x00004c4c //NVCSI_PHY_0_NVCSI_CIL_A_CPHY_EDGE_DELAY_CTRL_0
|
|
0 0x00011128 0xe000e000 0xc000c000 //NVCSI_PHY_0_NVCSI_CIL_B_CPHY_CALIB_CTRL_0
|
|
0 0x00011134 0x0000fefe 0x00004c4c //NVCSI_PHY_0_NVCSI_CIL_B_CPHY_EDGE_DELAY_CTRL_0
|
|
0 0x00021018 0x00070000 0x00020000 //NVCSI_PHY_1_NVCSI_CIL_PAD_CONFIG_0
|
|
0 0x0002109c 0xe000e000 0xc000c000 //NVCSI_PHY_1_NVCSI_CIL_A_CPHY_CALIB_CTRL_0
|
|
0 0x000210a8 0x0000fefe 0x00004c4c //NVCSI_PHY_1_NVCSI_CIL_A_CPHY_EDGE_DELAY_CTRL_0
|
|
0 0x00021128 0xe000e000 0xc000c000 //NVCSI_PHY_1_NVCSI_CIL_B_CPHY_CALIB_CTRL_0
|
|
0 0x00021134 0x0000fefe 0x00004c4c //NVCSI_PHY_1_NVCSI_CIL_B_CPHY_EDGE_DELAY_CTRL_0
|
|
0 0x00031018 0x00070000 0x00020000 //NVCSI_PHY_2_NVCSI_CIL_PAD_CONFIG_0
|
|
0 0x0003109c 0xe000e000 0xc000c000 //NVCSI_PHY_2_NVCSI_CIL_A_CPHY_CALIB_CTRL_0
|
|
0 0x000310a8 0x0000fefe 0x00004c4c //NVCSI_PHY_2_NVCSI_CIL_A_CPHY_EDGE_DELAY_CTRL_0
|
|
0 0x00031128 0xe000e000 0xc000c000 //NVCSI_PHY_2_NVCSI_CIL_B_CPHY_CALIB_CTRL_0
|
|
0 0x00031134 0x0000fefe 0x00004c4c //NVCSI_PHY_2_NVCSI_CIL_B_CPHY_EDGE_DELAY_CTRL_0
|
|
0 0x00041018 0x00070000 0x00020000 //NVCSI_PHY_3_NVCSI_CIL_PAD_CONFIG_0
|
|
0 0x0004109c 0xe000e000 0xc000c000 //NVCSI_PHY_3_NVCSI_CIL_A_CPHY_CALIB_CTRL_0
|
|
0 0x000410a8 0x0000fefe 0x00004c4c //NVCSI_PHY_3_NVCSI_CIL_A_CPHY_EDGE_DELAY_CTRL_0
|
|
0 0x00041128 0xe000e000 0xc000c000 //NVCSI_PHY_3_NVCSI_CIL_B_CPHY_CALIB_CTRL_0
|
|
0 0x00041134 0x0000fefe 0x00004c4c //NVCSI_PHY_3_NVCSI_CIL_B_CPHY_EDGE_DELAY_CTRL_0
|
|
0 0x0001102c 0xfc000000 0xe0000000 //NVCSI_PHY_0_NVCSI_CIL_A_PAD_CONFIG_0
|
|
0 0x000110b8 0xfc000000 0xe0000000 //NVCSI_PHY_0_NVCSI_CIL_B_PAD_CONFIG_0
|
|
0 0x0002102c 0xfc000000 0xe0000000 //NVCSI_PHY_1_NVCSI_CIL_A_PAD_CONFIG_0
|
|
0 0x000210b8 0xfc000000 0xe0000000 //NVCSI_PHY_1_NVCSI_CIL_B_PAD_CONFIG_0
|
|
0 0x0003102c 0xfc000000 0xe0000000 //NVCSI_PHY_2_NVCSI_CIL_A_PAD_CONFIG_0
|
|
0 0x000310b8 0xfc000000 0xe0000000 //NVCSI_PHY_2_NVCSI_CIL_B_PAD_CONFIG_0
|
|
0 0x0004102c 0xfc000000 0xe0000000 //NVCSI_PHY_3_NVCSI_CIL_A_PAD_CONFIG_0
|
|
0 0x000410b8 0xfc000000 0xe0000000>; //NVCSI_PHY_3_NVCSI_CIL_B_PAD_CONFIG_0
|
|
};
|
|
prod_c_cphy_mode {
|
|
prod = <
|
|
0 0x00011030 0x007f7f7f 0x00444444 //NVCSI_PHY_0_NVCSI_CIL_A_DPHY_INADJ_CTRL_0
|
|
0 0x000110bc 0x007f7f7f 0x00444444 //NVCSI_PHY_0_NVCSI_CIL_B_DPHY_INADJ_CTRL_0
|
|
0 0x00021030 0x007f7f7f 0x00444444 //NVCSI_PHY_1_NVCSI_CIL_A_DPHY_INADJ_CTRL_0
|
|
0 0x000210bc 0x007f7f7f 0x00444444 //NVCSI_PHY_1_NVCSI_CIL_B_DPHY_INADJ_CTRL_0
|
|
0 0x00031030 0x007f7f7f 0x00444444 //NVCSI_PHY_2_NVCSI_CIL_A_DPHY_INADJ_CTRL_0
|
|
0 0x000310bc 0x007f7f7f 0x00444444 //NVCSI_PHY_2_NVCSI_CIL_B_DPHY_INADJ_CTRL_0
|
|
0 0x00041030 0x007f7f7f 0x00444444 //NVCSI_PHY_3_NVCSI_CIL_A_DPHY_INADJ_CTRL_0
|
|
0 0x000410bc 0x007f7f7f 0x00444444 //NVCSI_PHY_3_NVCSI_CIL_B_DPHY_INADJ_CTRL_0
|
|
0 0x000110a8 0x0000ffff 0x0000fcfc //NVCSI_PHY_0_NVCSI_CIL_A_CPHY_EDGE_DELAY_CTRL_0
|
|
0 0x0001109c 0xffffffff 0xd848d848 //NVCSI_PHY_0_NVCSI_CIL_A_CPHY_CALIB_CTRL_0
|
|
0 0x000110a0 0x00000003 0x00000000 //NVCSI_PHY_0_NVCSI_CIL_A_CPHY_CALIB_CTRL1_0
|
|
0 0x00011098 0x00000003 0x00000003 //NVCSI_PHY_0_NVCSI_CIL_A_CPHY_CALIB_START_0
|
|
0 0x00011134 0x0000ffff 0x0000fcfc //NVCSI_PHY_0_NVCSI_CIL_B_CPHY_EDGE_DELAY_CTRL_0
|
|
0 0x00011128 0xffffffff 0xd848d848 //NVCSI_PHY_0_NVCSI_CIL_B_CPHY_CALIB_CTRL_0
|
|
0 0x0001112c 0x00000003 0x00000000 //NVCSI_PHY_0_NVCSI_CIL_B_CPHY_CALIB_CTRL1_0
|
|
0 0x00011124 0x00000003 0x00000003 //NVCSI_PHY_0_NVCSI_CIL_B_CPHY_CALIB_START_0
|
|
0 0x000210a8 0x0000ffff 0x0000fcfc //NVCSI_PHY_1_NVCSI_CIL_A_CPHY_EDGE_DELAY_CTRL_0
|
|
0 0x0002109c 0xffffffff 0xd848d848 //NVCSI_PHY_1_NVCSI_CIL_A_CPHY_CALIB_CTRL_0
|
|
0 0x000210a0 0x00000003 0x00000000 //NVCSI_PHY_1_NVCSI_CIL_A_CPHY_CALIB_CTRL1_0
|
|
0 0x00021098 0x00000003 0x00000003 //NVCSI_PHY_1_NVCSI_CIL_A_CPHY_CALIB_START_0
|
|
0 0x00021134 0x0000ffff 0x0000fcfc //NVCSI_PHY_1_NVCSI_CIL_B_CPHY_EDGE_DELAY_CTRL_0
|
|
0 0x00021128 0xffffffff 0xd848d848 //NVCSI_PHY_1_NVCSI_CIL_B_CPHY_CALIB_CTRL_0
|
|
0 0x0002112c 0x00000003 0x00000000 //NVCSI_PHY_1_NVCSI_CIL_B_CPHY_CALIB_CTRL1_0
|
|
0 0x00021124 0x00000003 0x00000003 //NVCSI_PHY_1_NVCSI_CIL_B_CPHY_CALIB_START_0
|
|
0 0x000310a8 0x0000ffff 0x0000fcfc //NVCSI_PHY_2_NVCSI_CIL_A_CPHY_EDGE_DELAY_CTRL_0
|
|
0 0x0003109c 0xffffffff 0xd848d848 //NVCSI_PHY_2_NVCSI_CIL_A_CPHY_CALIB_CTRL_0
|
|
0 0x000310a0 0x00000003 0x00000000 //NVCSI_PHY_2_NVCSI_CIL_A_CPHY_CALIB_CTRL1_0
|
|
0 0x00031098 0x00000003 0x00000003 //NVCSI_PHY_2_NVCSI_CIL_A_CPHY_CALIB_START_0
|
|
0 0x00031134 0x0000ffff 0x0000fcfc //NVCSI_PHY_2_NVCSI_CIL_B_CPHY_EDGE_DELAY_CTRL_0
|
|
0 0x00031128 0xffffffff 0xd848d848 //NVCSI_PHY_2_NVCSI_CIL_B_CPHY_CALIB_CTRL_0
|
|
0 0x0003112c 0x00000003 0x00000000 //NVCSI_PHY_2_NVCSI_CIL_B_CPHY_CALIB_CTRL1_0
|
|
0 0x00031124 0x00000003 0x00000003 //NVCSI_PHY_2_NVCSI_CIL_B_CPHY_CALIB_START_0
|
|
0 0x000410a8 0x0000ffff 0x0000fcfc //NVCSI_PHY_3_NVCSI_CIL_A_CPHY_EDGE_DELAY_CTRL_0
|
|
0 0x0004109c 0xffffffff 0xd848d848 //NVCSI_PHY_3_NVCSI_CIL_A_CPHY_CALIB_CTRL_0
|
|
0 0x000410a0 0x00000003 0x00000000 //NVCSI_PHY_3_NVCSI_CIL_A_CPHY_CALIB_CTRL1_0
|
|
0 0x00041098 0x00000003 0x00000003 //NVCSI_PHY_3_NVCSI_CIL_A_CPHY_CALIB_START_0
|
|
0 0x00041134 0x0000ffff 0x0000fcfc //NVCSI_PHY_3_NVCSI_CIL_B_CPHY_EDGE_DELAY_CTRL_0
|
|
0 0x00041128 0xffffffff 0xd848d848 //NVCSI_PHY_3_NVCSI_CIL_B_CPHY_CALIB_CTRL_0
|
|
0 0x0004112c 0x00000003 0x00000000 //NVCSI_PHY_3_NVCSI_CIL_B_CPHY_CALIB_CTRL1_0
|
|
0 0x00041124 0x00000003 0x00000003>; //NVCSI_PHY_3_NVCSI_CIL_B_CPHY_CALIB_START_0
|
|
};
|
|
prod_c_dphy_mode {
|
|
prod = <
|
|
0 0x00011030 0x007f7f7f 0x00000000 //NVCSI_PHY_0_NVCSI_CIL_A_DPHY_INADJ_CTRL_0
|
|
0 0x000110bc 0x007f7f7f 0x00000000 //NVCSI_PHY_0_NVCSI_CIL_B_DPHY_INADJ_CTRL_0
|
|
0 0x00021030 0x007f7f7f 0x00000000 //NVCSI_PHY_1_NVCSI_CIL_A_DPHY_INADJ_CTRL_0
|
|
0 0x000210bc 0x007f7f7f 0x00000000 //NVCSI_PHY_1_NVCSI_CIL_B_DPHY_INADJ_CTRL_0
|
|
0 0x00031030 0x007f7f7f 0x00000000 //NVCSI_PHY_2_NVCSI_CIL_A_DPHY_INADJ_CTRL_0
|
|
0 0x000310bc 0x007f7f7f 0x00000000 //NVCSI_PHY_2_NVCSI_CIL_B_DPHY_INADJ_CTRL_0
|
|
0 0x00041030 0x007f7f7f 0x00000000 //NVCSI_PHY_3_NVCSI_CIL_A_DPHY_INADJ_CTRL_0
|
|
0 0x000410bc 0x007f7f7f 0x00000000>; //NVCSI_PHY_3_NVCSI_CIL_B_DPHY_INADJ_CTRL_0
|
|
};
|
|
};
|
|
};
|
|
|
|
pva0 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod {
|
|
prod = <
|
|
0 0x00073000 0x00000001 0x00000001 //PVA_CFG_INTR_ENABLE_0
|
|
0 0x00200050 0x00000001 0x00000000 //PVA_PM_TCM_CG_BYP_0
|
|
0 0x00030000 0x00000001 0x00000001 //PVA_PROC_CPUHALT_0
|
|
0 0x0002804c 0x000000ff 0x000000ff>; //PVA_SEC_LIC_INTR_ENABLE_0
|
|
};
|
|
};
|
|
};
|
|
|
|
pva1 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod {
|
|
prod = <
|
|
0 0x00073000 0x00000001 0x00000001 //PVA_CFG_INTR_ENABLE_0
|
|
0 0x00200050 0x00000001 0x00000000 //PVA_PM_TCM_CG_BYP_0
|
|
0 0x00030000 0x00000001 0x00000001 //PVA_PROC_CPUHALT_0
|
|
0 0x0002804c 0x000000ff 0x000000ff>; //PVA_SEC_LIC_INTR_ENABLE_0
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
ahci-sata@3507000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod {
|
|
prod = <
|
|
1 0x0000052C 0xFFFFFFFF 0x00031CE0 // T_SATA0_SPARE_3 31:0
|
|
1 0x00000338 0x10000000 0x10000000 // T_SATA0_AHCI_HBA_CYA_1_0 BIT(28)
|
|
>;
|
|
};
|
|
};
|
|
};
|
|
|
|
|
|
i2c@3160000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod {
|
|
prod = <
|
|
0 0x0000009c 0x0000ffff 0x00000308 //I2C_I2C_HS_INTERFACE_TIMING_0_0
|
|
0 0x000000d4 0x000000ff 0x00000000 //I2C_I2C_INTERFACE_TIMING_2_0
|
|
0 0x000000d8 0x000000ff 0x00000000 //I2C_I2C_HS_INTERFACE_TIMING_2_0
|
|
0 0x000000dc 0x0000ffff 0x00000001 //I2C_I2C_MSTR_DATA_CAPTURE_TIMING_0
|
|
0 0x000000e0 0x0000ffff 0x00000002>; //I2C_I2C_SLV_DATA_CAPTURE_TIMING_0
|
|
};
|
|
prod_c_fm {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x003c0000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000202 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_fmplus {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x00160000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000202 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_hs {
|
|
prod = <
|
|
0 0x0000006c 0xffffffff 0x00020002 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000101 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202 //I2C_I2C_INTERFACE_TIMING_1_0
|
|
0 0x000000a0 0x00ffffff 0x00090909>; //I2C_I2C_HS_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_sm {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x004f0000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000708 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x08080808>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
};
|
|
};
|
|
|
|
i2c@c240000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod {
|
|
prod = <
|
|
0 0x0000009c 0x0000ffff 0x00000308 //I2C_I2C_HS_INTERFACE_TIMING_0_0
|
|
0 0x000000d4 0x000000ff 0x00000000 //I2C_I2C_INTERFACE_TIMING_2_0
|
|
0 0x000000d8 0x000000ff 0x00000000 //I2C_I2C_HS_INTERFACE_TIMING_2_0
|
|
0 0x000000dc 0x0000ffff 0x00000001 //I2C_I2C_MSTR_DATA_CAPTURE_TIMING_0
|
|
0 0x000000e0 0x0000ffff 0x00000002>; //I2C_I2C_SLV_DATA_CAPTURE_TIMING_0
|
|
};
|
|
prod_c_fm {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x003c0000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000202 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_fmplus {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x00160000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000202 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_hs {
|
|
prod = <
|
|
0 0x0000006c 0xffffffff 0x00020002 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000101 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202 //I2C_I2C_INTERFACE_TIMING_1_0
|
|
0 0x000000a0 0x00ffffff 0x00090909>; //I2C_I2C_HS_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_sm {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x004f0000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000708 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x08080808>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
};
|
|
};
|
|
|
|
i2c@3180000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod {
|
|
prod = <
|
|
0 0x0000009c 0x0000ffff 0x00000308 //I2C_I2C_HS_INTERFACE_TIMING_0_0
|
|
0 0x000000d4 0x000000ff 0x00000000 //I2C_I2C_INTERFACE_TIMING_2_0
|
|
0 0x000000d8 0x000000ff 0x00000000 //I2C_I2C_HS_INTERFACE_TIMING_2_0
|
|
0 0x000000dc 0x0000ffff 0x00000001 //I2C_I2C_MSTR_DATA_CAPTURE_TIMING_0
|
|
0 0x000000e0 0x0000ffff 0x00000002>; //I2C_I2C_SLV_DATA_CAPTURE_TIMING_0
|
|
};
|
|
prod_c_fm {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x003c0000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000202 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_fmplus {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x00160000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000202 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_hs {
|
|
prod = <
|
|
0 0x0000006c 0xffffffff 0x00580002 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000101 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202 //I2C_I2C_INTERFACE_TIMING_1_0
|
|
0 0x000000a0 0x00ffffff 0x00090909>; //I2C_I2C_HS_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_sm {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x004f0000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000708 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x08080808>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
};
|
|
};
|
|
|
|
i2c@3190000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod {
|
|
prod = <
|
|
0 0x0000009c 0x0000ffff 0x00000308 //I2C_I2C_HS_INTERFACE_TIMING_0_0
|
|
0 0x000000d4 0x000000ff 0x00000000 //I2C_I2C_INTERFACE_TIMING_2_0
|
|
0 0x000000d8 0x000000ff 0x00000000 //I2C_I2C_HS_INTERFACE_TIMING_2_0
|
|
0 0x000000dc 0x0000ffff 0x00000001 //I2C_I2C_MSTR_DATA_CAPTURE_TIMING_0
|
|
0 0x000000e0 0x0000ffff 0x00000002>; //I2C_I2C_SLV_DATA_CAPTURE_TIMING_0
|
|
};
|
|
prod_c_fm {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x003c0000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000202 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_fmplus {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x00160000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000202 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_hs {
|
|
prod = <
|
|
0 0x0000006c 0xffffffff 0x00580002 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000101 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202 //I2C_I2C_INTERFACE_TIMING_1_0
|
|
0 0x000000a0 0x00ffffff 0x00090909>; //I2C_I2C_HS_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_sm {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x004f0000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000708 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x08080808>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
};
|
|
};
|
|
|
|
i2c@31b0000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod {
|
|
prod = <
|
|
0 0x0000009c 0x0000ffff 0x00000308 //I2C_I2C_HS_INTERFACE_TIMING_0_0
|
|
0 0x000000d4 0x000000ff 0x00000000 //I2C_I2C_INTERFACE_TIMING_2_0
|
|
0 0x000000d8 0x000000ff 0x00000000 //I2C_I2C_HS_INTERFACE_TIMING_2_0
|
|
0 0x000000dc 0x0000ffff 0x00000001 //I2C_I2C_MSTR_DATA_CAPTURE_TIMING_0
|
|
0 0x000000e0 0x0000ffff 0x00000002>; //I2C_I2C_SLV_DATA_CAPTURE_TIMING_0
|
|
};
|
|
prod_c_fm {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x003c0000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000202 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_fmplus {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x00160000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000202 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_hs {
|
|
prod = <
|
|
0 0x0000006c 0xffffffff 0x00580002 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000201 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202 //I2C_I2C_INTERFACE_TIMING_1_0
|
|
0 0x000000a0 0x00ffffff 0x00090909>; //I2C_I2C_HS_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_sm {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x004f0000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000708 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x08080808>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
};
|
|
};
|
|
|
|
i2c@31c0000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod {
|
|
prod = <
|
|
0 0x0000009c 0x0000ffff 0x00000308 //I2C_I2C_HS_INTERFACE_TIMING_0_0
|
|
0 0x000000d4 0x000000ff 0x00000000 //I2C_I2C_INTERFACE_TIMING_2_0
|
|
0 0x000000d8 0x000000ff 0x00000000 //I2C_I2C_HS_INTERFACE_TIMING_2_0
|
|
0 0x000000dc 0x0000ffff 0x00000001 //I2C_I2C_MSTR_DATA_CAPTURE_TIMING_0
|
|
0 0x000000e0 0x0000ffff 0x00000002>; //I2C_I2C_SLV_DATA_CAPTURE_TIMING_0
|
|
};
|
|
prod_c_fm {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x003c0000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000202 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_fmplus {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x00160000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000202 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_hs {
|
|
prod = <
|
|
0 0x0000006c 0xffffffff 0x00580002 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000101 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202 //I2C_I2C_INTERFACE_TIMING_1_0
|
|
0 0x000000a0 0x00ffffff 0x00090909>; //I2C_I2C_HS_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_sm {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x004f0000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000708 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x08080808>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
};
|
|
};
|
|
|
|
i2c@c250000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod {
|
|
prod = <
|
|
0 0x0000009c 0x0000ffff 0x00000308 //I2C_I2C_HS_INTERFACE_TIMING_0_0
|
|
0 0x000000d4 0x000000ff 0x00000000 //I2C_I2C_INTERFACE_TIMING_2_0
|
|
0 0x000000d8 0x000000ff 0x00000000 //I2C_I2C_HS_INTERFACE_TIMING_2_0
|
|
0 0x000000dc 0x0000ffff 0x00000001 //I2C_I2C_MSTR_DATA_CAPTURE_TIMING_0
|
|
0 0x000000e0 0x0000ffff 0x00000002>; //I2C_I2C_SLV_DATA_CAPTURE_TIMING_0
|
|
};
|
|
prod_c_fm {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x003c0000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000202 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_fmplus {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x00160000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000202 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_hs {
|
|
prod = <
|
|
0 0x0000006c 0xffffffff 0x00580002 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000101 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202 //I2C_I2C_INTERFACE_TIMING_1_0
|
|
0 0x000000a0 0x00ffffff 0x00090909>; //I2C_I2C_HS_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_sm {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x004f0000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000708 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x08080808>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
};
|
|
};
|
|
|
|
i2c@31e0000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod {
|
|
prod = <
|
|
0 0x0000009c 0x0000ffff 0x00000308 //I2C_I2C_HS_INTERFACE_TIMING_0_0
|
|
0 0x000000d4 0x000000ff 0x00000000 //I2C_I2C_INTERFACE_TIMING_2_0
|
|
0 0x000000d8 0x000000ff 0x00000000 //I2C_I2C_HS_INTERFACE_TIMING_2_0
|
|
0 0x000000dc 0x0000ffff 0x00000001 //I2C_I2C_MSTR_DATA_CAPTURE_TIMING_0
|
|
0 0x000000e0 0x0000ffff 0x00000002>; //I2C_I2C_SLV_DATA_CAPTURE_TIMING_0
|
|
};
|
|
prod_c_fm {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x003c0000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000202 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_fmplus {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x00160000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000202 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_hs {
|
|
prod = <
|
|
0 0x0000006c 0xffffffff 0x00580002 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000101 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x02020202 //I2C_I2C_INTERFACE_TIMING_1_0
|
|
0 0x000000a0 0x00ffffff 0x00090909>; //I2C_I2C_HS_INTERFACE_TIMING_1_0
|
|
};
|
|
prod_c_sm {
|
|
prod = <
|
|
0 0x0000006c 0xffff0000 0x004f0000 //I2C_I2C_CLK_DIVISOR_REGISTER_0
|
|
0 0x00000094 0x0000ffff 0x00000708 //I2C_I2C_INTERFACE_TIMING_0_0
|
|
0 0x00000098 0xffffffff 0x08080808>; //I2C_I2C_INTERFACE_TIMING_1_0
|
|
};
|
|
};
|
|
};
|
|
|
|
mipical@3990000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod {
|
|
prod = <
|
|
0 0x00000044 0x003f0000 0x00000000 //MIPI_CAL_DSIA_MIPI_CAL_CONFIG_0
|
|
0 0x00000048 0x003f0000 0x00000000 //MIPI_CAL_DSIB_MIPI_CAL_CONFIG_0
|
|
0 0x0000004c 0x003f0000 0x00000000 //MIPI_CAL_DSIC_MIPI_CAL_CONFIG_0
|
|
0 0x00000050 0x003f0000 0x00000000 //MIPI_CAL_DSID_MIPI_CAL_CONFIG_0
|
|
0 0x0000006c 0x000f00f4 0x00010010 //MIPI_CAL_MIPI_BIAS_PAD_CFG2_0
|
|
0 0x00000070 0x003f0000 0x00000000 //MIPI_CAL_DSIA_MIPI_CAL_CONFIG_2_0
|
|
0 0x00000074 0x003f0000 0x00000000 //MIPI_CAL_DSIB_MIPI_CAL_CONFIG_2_0
|
|
0 0x0000007c 0x003f0000 0x00000000 //MIPI_CAL_DSIC_MIPI_CAL_CONFIG_2_0
|
|
0 0x00000080 0x003f0000 0x00000000>; //MIPI_CAL_DSID_MIPI_CAL_CONFIG_2_0
|
|
};
|
|
|
|
prod_c_cphy_csi {
|
|
prod = <
|
|
0 0x00000018 0x0000f81f 0x00000000 //MIPI_CAL_CILA_MIPI_CAL_CONFIG_0
|
|
0 0x0000001c 0x0000f81f 0x00000000 //MIPI_CAL_CILB_MIPI_CAL_CONFIG_0
|
|
0 0x00000020 0x0000f81f 0x00000000 //MIPI_CAL_CILC_MIPI_CAL_CONFIG_0
|
|
0 0x00000024 0x0000f81f 0x00000000 //MIPI_CAL_CILD_MIPI_CAL_CONFIG_0
|
|
0 0x00000028 0x0000f81f 0x00000000 //MIPI_CAL_CILE_MIPI_CAL_CONFIG_0
|
|
0 0x0000002c 0x0000f81f 0x00000000 //MIPI_CAL_CILF_MIPI_CAL_CONFIG_0
|
|
0 0x00000030 0x0000f81f 0x00000000 //MIPI_CAL_CILG_MIPI_CAL_CONFIG_0
|
|
0 0x00000034 0x0000f81f 0x00000000>; //MIPI_CAL_CILH_MIPI_CAL_CONFIG_0
|
|
};
|
|
|
|
prod_c_dphy_csi {
|
|
prod = <
|
|
0 0x00000018 0x0000f81f 0x00000000 //MIPI_CAL_CILA_MIPI_CAL_CONFIG_0
|
|
0 0x0000001c 0x0000f81f 0x00000000 //MIPI_CAL_CILB_MIPI_CAL_CONFIG_0
|
|
0 0x00000020 0x0000f81f 0x00000000 //MIPI_CAL_CILC_MIPI_CAL_CONFIG_0
|
|
0 0x00000024 0x0000f81f 0x00000000 //MIPI_CAL_CILD_MIPI_CAL_CONFIG_0
|
|
0 0x00000028 0x0000f81f 0x00000000 //MIPI_CAL_CILE_MIPI_CAL_CONFIG_0
|
|
0 0x0000002c 0x0000f81f 0x00000000 //MIPI_CAL_CILF_MIPI_CAL_CONFIG_0
|
|
0 0x00000030 0x0000f81f 0x00000000 //MIPI_CAL_CILG_MIPI_CAL_CONFIG_0
|
|
0 0x00000034 0x0000f81f 0x00000000>; //MIPI_CAL_CILH_MIPI_CAL_CONFIG_0
|
|
};
|
|
};
|
|
};
|
|
|
|
tegra_nvlink_controller {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod {
|
|
prod = <
|
|
0 0x00000038 0x00000001 0x00000001 //MSSNVLINK_LINK_CONTROL_0
|
|
0 0x00000054 0x003fffff 0x00000000 //MSSNVLINK_MSSNVLINK_REGULAR_INTMASK_0
|
|
0 0x00000058 0x003fffff 0x00000000>; //MSSNVLINK_MSSNVLINK_CRITICAL_INTMASK_0
|
|
};
|
|
};
|
|
};
|
|
|
|
pinctrl@3790000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod {
|
|
prod = <
|
|
0 0x00000000 0x00000038 0x00000010 //PCIE_PEXCLK_PADCTL0_REFCLK_COMMON_CFG_0
|
|
0 0x00000004 0x00000038 0x00000010 //PCIE_PEXCLK_PADCTL0_REFCLK_COMMON_CFG_1
|
|
1 0x00000000 0x00000038 0x00000010>; //PCIE_PEXCLK_PADCTL1_REFCLK_COMMON_CFG_0
|
|
};
|
|
};
|
|
};
|
|
|
|
pmc@c360000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod {
|
|
prod = <
|
|
1 0x0000202c 0x80000000 0x80000000 //SCRATCH_SCRATCH0_ECO_0
|
|
2 0x00000010 0x00000001 0x00000001>; //PMC_MISC_FUSE_CONTROL_0
|
|
};
|
|
};
|
|
};
|
|
|
|
se_elp@3ad0000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod {
|
|
prod = <
|
|
1 0x00000f04 0x00000008 0x00000008 //SE_RNG1_RNG1_MODE_0
|
|
1 0x00000f08 0x00000002 0x00000002 //SE_RNG1_RNG1_SMODE_0
|
|
1 0x00000fec 0x00000002 0x00000000>; //SE_RNG1_RNG1_SECURITY_0
|
|
};
|
|
};
|
|
};
|
|
|
|
sdhci@3400000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod_c_1_8v {
|
|
prod = <
|
|
0 0x000001e0 0x07f00000 0x00600000>; //SDMMCA_SDMEMCOMPPADCTRL_0
|
|
};
|
|
prod_c_3_3v {
|
|
prod = <
|
|
0 0x000001e0 0x07f00000 0x00800000>; //SDMMCA_SDMEMCOMPPADCTRL_0
|
|
};
|
|
prod {
|
|
prod = <
|
|
0 0x00000004 0x00000fff 0x00000200 //SDMMCA_BLOCK_SIZE_BLOCK_COUNT_0
|
|
0 0x00000028 0x00000022 0x00000002 //SDMMCA_POWER_CONTROL_HOST_0
|
|
0 0x00000100 0x1fff004a 0x05090000 //SDMMCA_VENDOR_CLOCK_CNTRL_0
|
|
0 0x00000128 0x42000000 0x00000000 //SDMMCA_VENDOR_MISC_CNTRL2_0
|
|
0 0x000001ac 0x00000004 0x00000000 //SDMMCA_VENDOR_IO_TRIM_CNTRL_0
|
|
0 0x000001c0 0x00001fc0 0x00000040 //SDMMCA_VENDOR_TUNING_CNTRL0_0
|
|
0 0x000001c4 0x0003ff77 0x00000400 //SDMMCA_VENDOR_TUNING_CNTRL1_0
|
|
0 0x000001e0 0x8007f000 0x00007000 //SDMMCA_SDMEMCOMPPADCTRL_0
|
|
0 0x000001e4 0x20000000 0x20000000 //SDMMCA_AUTO_CAL_CONFIG_0
|
|
0 0x00000204 0x80000000 0x00000000>; //SDMMCA_VENDOR_MISC_CNTRL3_0
|
|
};
|
|
prod_c_ds {
|
|
prod = <
|
|
0 0x00000100 0x1fff0000 0x05090000>; //SDMMC_VENDOR_CLOCK_CNTRL_0
|
|
};
|
|
prod_c_hs {
|
|
prod = <
|
|
0 0x00000100 0x1fff0000 0x05090000>; //SDMMC_VENDOR_CLOCK_CNTRL_0
|
|
};
|
|
prod_c_ddr52 {
|
|
prod = <
|
|
0 0x0000003c 0x00070000 0x00040000 //SDMMCA_AUTO_CMD12_ERR_STATUS_0
|
|
0 0x00000120 0x0000fffe 0x00000298>; //SDMMCA_VENDOR_MISC_CNTRL_0
|
|
};
|
|
prod_c_hs200 {
|
|
prod = <
|
|
0 0x0000003c 0x00070000 0x00030000 //SDMMCA_AUTO_CMD12_ERR_STATUS_0
|
|
0 0x000001c0 0x0000e000 0x00004000>; //SDMMCA_VENDOR_TUNING_CNTRL0_0
|
|
};
|
|
prod_c_sdr104 {
|
|
prod = <
|
|
0 0x0000003c 0x00070000 0x00030000 //SDMMCA_AUTO_CMD12_ERR_STATUS_0
|
|
0 0x000001c0 0x0000e000 0x00004000>; //SDMMCA_VENDOR_TUNING_CNTRL0_0
|
|
};
|
|
prod_c_sdr12 {
|
|
prod = <
|
|
0 0x0000003c 0x00070000 0x00000000>; //SDMMCA_AUTO_CMD12_ERR_STATUS_0
|
|
};
|
|
prod_c_sdr25 {
|
|
prod = <
|
|
0 0x0000003c 0x00070000 0x00010000>; //SDMMCA_AUTO_CMD12_ERR_STATUS_0
|
|
};
|
|
prod_c_sdr50 {
|
|
prod = <
|
|
0 0x0000003c 0x00070000 0x00020000 //SDMMCA_AUTO_CMD12_ERR_STATUS_0
|
|
0 0x000001c0 0x0000e000 0x00008000>; //SDMMCA_VENDOR_TUNING_CNTRL0_0
|
|
};
|
|
};
|
|
};
|
|
|
|
sdhci@3440000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod_c_1_8v {
|
|
prod = <
|
|
0 0x000001e0 0x07f00000 0x00600000>; //SDMMC_SDMEMCOMPPADCTRL_0
|
|
};
|
|
prod_c_3_3v {
|
|
prod = <
|
|
0 0x000001e0 0x07f00000 0x00800000>; //SDMMC_SDMEMCOMPPADCTRL_0
|
|
};
|
|
prod {
|
|
prod = <
|
|
0 0x00000004 0x00000fff 0x00000200 //SDMMC_BLOCK_SIZE_BLOCK_COUNT_0
|
|
0 0x00000028 0x00000022 0x00000002 //SDMMC_POWER_CONTROL_HOST_0
|
|
0 0x00000100 0x1fff004a 0x05090000 //SDMMC_VENDOR_CLOCK_CNTRL_0
|
|
0 0x00000128 0x42000000 0x00000000 //SDMMC_VENDOR_MISC_CNTRL2_0
|
|
0 0x000001ac 0x00000004 0x00000000 //SDMMC_VENDOR_IO_TRIM_CNTRL_0
|
|
0 0x000001c0 0x00001fc0 0x00000040 //SDMMC_VENDOR_TUNING_CNTRL0_0
|
|
0 0x000001c4 0x0003ff77 0x00000400 //SDMMC_VENDOR_TUNING_CNTRL1_0
|
|
0 0x000001e0 0x8007f000 0x00007000 //SDMMC_SDMEMCOMPPADCTRL_0
|
|
0 0x000001e4 0x20000000 0x20000000 //SDMMC_AUTO_CAL_CONFIG_0
|
|
0 0x00000204 0x80000000 0x00000000>; //SDMMC_VENDOR_MISC_CNTRL3_0
|
|
};
|
|
prod_c_ds {
|
|
prod = <
|
|
0 0x00000100 0x1fff0000 0x05090000>; //SDMMC_VENDOR_CLOCK_CNTRL_0
|
|
};
|
|
prod_c_hs {
|
|
prod = <
|
|
0 0x00000100 0x1fff0000 0x05090000>; //SDMMC_VENDOR_CLOCK_CNTRL_0
|
|
};
|
|
prod_c_ddr52 {
|
|
prod = <
|
|
0 0x0000003c 0x00070000 0x00040000 //SDMMC_AUTO_CMD12_ERR_STATUS_0
|
|
0 0x00000120 0x0000fffe 0x00000298>; //SDMMC_VENDOR_MISC_CNTRL_0
|
|
};
|
|
prod_c_hs200 {
|
|
prod = <
|
|
0 0x0000003c 0x00070000 0x00030000 //SDMMC_AUTO_CMD12_ERR_STATUS_0
|
|
0 0x000001c0 0x0000e000 0x00004000>; //SDMMC_VENDOR_TUNING_CNTRL0_0
|
|
};
|
|
prod_c_sdr104 {
|
|
prod = <
|
|
0 0x0000003c 0x00070000 0x00030000 //SDMMC_AUTO_CMD12_ERR_STATUS_0
|
|
0 0x000001c0 0x0000e000 0x00004000>; //SDMMC_VENDOR_TUNING_CNTRL0_0
|
|
};
|
|
prod_c_sdr12 {
|
|
prod = <
|
|
0 0x0000003c 0x00070000 0x00000000>; //SDMMC_AUTO_CMD12_ERR_STATUS_0
|
|
};
|
|
prod_c_sdr25 {
|
|
prod = <
|
|
0 0x0000003c 0x00070000 0x00010000>; //SDMMC_AUTO_CMD12_ERR_STATUS_0
|
|
};
|
|
prod_c_sdr50 {
|
|
prod = <
|
|
0 0x0000003c 0x00070000 0x00020000 //SDMMC_AUTO_CMD12_ERR_STATUS_0
|
|
0 0x000001c0 0x0000e000 0x00008000>; //SDMMC_VENDOR_TUNING_CNTRL0_0
|
|
};
|
|
};
|
|
};
|
|
|
|
sdhci@3460000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod {
|
|
prod = <
|
|
0 0x00000004 0x00000fff 0x00000200 //SDMMCAB_BLOCK_SIZE_BLOCK_COUNT_0
|
|
0 0x00000028 0x00000020 0x00000020 //SDMMCAB_POWER_CONTROL_HOST_0
|
|
0 0x00000100 0x1fff004a 0x14080000 //SDMMCAB_VENDOR_CLOCK_CNTRL_0
|
|
0 0x0000010c 0x00003f00 0x00002800 //SDMMCAB_VENDOR_CAP_OVERRIDES_0
|
|
0 0x00000128 0x43000000 0x00000000 //SDMMCAB_VENDOR_MISC_CNTRL2_0
|
|
0 0x000001ac 0x00000004 0x00000000 //SDMMCAB_VENDOR_IO_TRIM_CNTRL_0
|
|
0 0x000001c0 0x00001fc0 0x00000040 //SDMMCAB_VENDOR_TUNING_CNTRL0_0
|
|
0 0x000001c4 0x0003ff77 0x00000400 //SDMMCAB_VENDOR_TUNING_CNTRL1_0
|
|
0 0x000001e0 0x87f7f000 0x00a0a000 //SDMMCAB_SDMEMCOMPPADCTRL_0
|
|
0 0x000001e4 0x20000000 0x20000000 //SDMMCAB_AUTO_CAL_CONFIG_0
|
|
0 0x00000204 0x80000000 0x00000000 //SDMMCAB_VENDOR_MISC_CNTRL3_0
|
|
0 0x00000218 0x80000000 0x00000000>; //SDMMCAB_VENDOR_CQE_CNTRL1_0
|
|
};
|
|
prod_c_ds {
|
|
prod = <
|
|
0 0x00000100 0x1fff0000 0x14080000>; //SDMMC_VENDOR_CLOCK_CNTRL_0
|
|
};
|
|
prod_c_hs {
|
|
prod = <
|
|
0 0x00000100 0x1fff0000 0x14080000>; //SDMMC_VENDOR_CLOCK_CNTRL_0
|
|
};
|
|
prod_c_cqe {
|
|
prod = <
|
|
0 0x0000f008 0x00000001 0x00000001>; //SDMMCAB_CQE_CQCFG_0
|
|
};
|
|
prod_c_ddr52 {
|
|
prod = <
|
|
0 0x0000003c 0x00070000 0x00040000 //SDMMCAB_AUTO_CMD12_ERR_STATUS_0
|
|
0 0x00000120 0x0000fffe 0x00000298>; //SDMMCAB_VENDOR_MISC_CNTRL_0
|
|
};
|
|
prod_c_hs200 {
|
|
prod = <
|
|
0 0x0000003c 0x00070000 0x00030000 //SDMMCAB_AUTO_CMD12_ERR_STATUS_0
|
|
0 0x000001c0 0x0000e000 0x00004000>; //SDMMCAB_VENDOR_TUNING_CNTRL0_0
|
|
};
|
|
prod_c_hs400 {
|
|
prod = <
|
|
0 0x0000003c 0x00070000 0x00050000 //SDMMCAB_AUTO_CMD12_ERR_STATUS_0
|
|
0 0x00000100 0x00ff0008 0x00080008 //SDMMCAB_VENDOR_CLOCK_CNTRL_0
|
|
0 0x000001c0 0x0000e000 0x00004000 //SDMMCAB_VENDOR_TUNING_CNTRL0_0
|
|
0 0x000001e4 0x00007f7f 0x00000000>; //SDMMCAB_AUTO_CAL_CONFIG_0
|
|
};
|
|
prod_c_sdr50 {
|
|
prod = <
|
|
0 0x0000003c 0x00070000 0x00020000>; //SDMMCAB_AUTO_CMD12_ERR_STATUS_0
|
|
};
|
|
};
|
|
};
|
|
|
|
xusb_padctl@3520000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod_c_bias {
|
|
prod = <0 0x284 0x00000038 0x38>; //XUSB_PADCTL_USB2_BIAS_PAD_CTL_0[HS_DISCON_LEVEL]=7
|
|
};
|
|
prod {
|
|
prod = <
|
|
0 0x00000024 0x00000fff 0x00000000>; //XUSB_PADCTL_ELPG_PROGRAM_1_0
|
|
};
|
|
};
|
|
};
|
|
ether_qos@2490000 {
|
|
prod-settings {
|
|
#prod-cells = <4>;
|
|
prod {
|
|
prod = <
|
|
0 0x00008800 0x80000000 0x00000000 //ETHER_QOS_SDMEMCOMPPADCTRL_0
|
|
0 0x00008804 0x20000000 0x20000000>; //ETHER_QOS_AUTO_CAL_CONFIG_0
|
|
};
|
|
};
|
|
};
|
|
};
|