forked from rrcarlosr/Jetpack
42 lines
877 B
Plaintext
42 lines
877 B
Plaintext
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CONFIG_ARM=y
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CONFIG_ARCH_SOCFPGA=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_SPL_DM=y
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CONFIG_DM_GPIO=y
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CONFIG_TARGET_SOCFPGA_IS1=y
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CONFIG_SPL_STACK_R_ADDR=0x00800000
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CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1"
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CONFIG_SPL=y
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CONFIG_SPL_STACK_R=y
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CONFIG_FIT=y
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CONFIG_BOOTDELAY=3
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_BOOTZ=y
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# CONFIG_CMD_IMLS is not set
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CONFIG_CMD_ASKENV=y
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CONFIG_CMD_GREPENV=y
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_SF=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_FS_GENERIC=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_DWAPB_GPIO=y
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CONFIG_SYS_I2C_DW=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_BAR=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_DM_ETH=y
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CONFIG_ETH_DESIGNWARE=y
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CONFIG_SYS_NS16550=y
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CONFIG_CADENCE_QSPI=y
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