forked from rrcarlosr/Jetpack
57 lines
1.2 KiB
C
57 lines
1.2 KiB
C
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/*
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* Copyright (c) 2015 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __TPS65090_PMIC_H_
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#define __TPS65090_PMIC_H_
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/* I2C device address for TPS65090 PMU */
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#define TPS65090_I2C_ADDR 0x48
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/* TPS65090 register addresses */
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enum {
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REG_IRQ1 = 0,
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REG_CG_CTRL0 = 4,
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REG_CG_STATUS1 = 0xa,
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REG_FET_BASE = 0xe, /* Not a real register, FETs count from here */
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REG_FET1_CTRL,
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REG_FET2_CTRL,
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REG_FET3_CTRL,
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REG_FET4_CTRL,
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REG_FET5_CTRL,
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REG_FET6_CTRL,
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REG_FET7_CTRL,
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TPS65090_NUM_REGS,
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};
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enum {
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IRQ1_VBATG = 1 << 3,
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CG_CTRL0_ENC_MASK = 0x01,
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MAX_FET_NUM = 7,
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MAX_CTRL_READ_TRIES = 5,
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/* TPS65090 FET_CTRL register values */
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FET_CTRL_TOFET = 1 << 7, /* Timeout, startup, overload */
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FET_CTRL_PGFET = 1 << 4, /* Power good for FET status */
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FET_CTRL_WAIT = 3 << 2, /* Overcurrent timeout max */
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FET_CTRL_ADENFET = 1 << 1, /* Enable output auto discharge */
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FET_CTRL_ENFET = 1 << 0, /* Enable FET */
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};
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enum {
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/* Status register fields */
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TPS65090_ST1_OTC = 1 << 0,
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TPS65090_ST1_OCC = 1 << 1,
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TPS65090_ST1_STATE_SHIFT = 4,
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TPS65090_ST1_STATE_MASK = 0xf << TPS65090_ST1_STATE_SHIFT,
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};
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/* Drivers name */
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#define TPS65090_FET_DRIVER "tps65090_fet"
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#endif /* __TPS65090_PMIC_H_ */
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