forked from rrcarlosr/Jetpack
80 lines
2.0 KiB
C
80 lines
2.0 KiB
C
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/*
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* Copyright (C) 2013 Marek Vasut <marex@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIGS_BG0900_H__
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#define __CONFIGS_BG0900_H__
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/* System configurations */
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#define CONFIG_MX28 /* i.MX28 SoC */
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/* U-Boot Commands */
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DOS_PARTITION
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_NAND_TRIMFFS
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/* Memory configuration */
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#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
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#define PHYS_SDRAM_1 0x40000000 /* Base address */
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#define PHYS_SDRAM_1_SIZE 0x10000000 /* Max 256 MB RAM */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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/* Environment */
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#define CONFIG_ENV_SIZE (16 * 1024)
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_ENV_IS_NOWHERE
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/* FEC Ethernet on SoC */
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#ifdef CONFIG_CMD_NET
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#define CONFIG_FEC_MXC
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#endif
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/* SPI */
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#ifdef CONFIG_CMD_SPI
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#define CONFIG_DEFAULT_SPI_BUS 2
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#define CONFIG_DEFAULT_SPI_CS 0
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#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
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/* SPI FLASH */
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#ifdef CONFIG_CMD_SF
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#define CONFIG_SF_DEFAULT_BUS 2
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#define CONFIG_SF_DEFAULT_CS 0
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#define CONFIG_SF_DEFAULT_SPEED 40000000
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
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#define CONFIG_ENV_SPI_BUS 2
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#define CONFIG_ENV_SPI_CS 0
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#define CONFIG_ENV_SPI_MAX_HZ 40000000
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#define CONFIG_ENV_SPI_MODE SPI_MODE_0
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#endif
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#endif
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/* Boot Linux */
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#define CONFIG_BOOTFILE "uImage"
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#define CONFIG_BOOTARGS "console=ttyAMA0,115200"
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#define CONFIG_BOOTCOMMAND "bootm"
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#define CONFIG_LOADADDR 0x42000000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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/* Extra Environment */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"update_spi_firmware_filename=u-boot.sb\0" \
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"update_spi_firmware_maxsz=0x80000\0" \
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"update_spi_firmware=" /* Update the SPI flash firmware */ \
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"if sf probe 2:0 ; then " \
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"if tftp ${update_spi_firmware_filename} ; then " \
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"sf erase 0x0 +${filesize} ; " \
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"sf write ${loadaddr} 0x0 ${filesize} ; " \
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"fi ; " \
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"fi\0"
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/* The rest of the configuration is shared */
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#include <configs/mxs.h>
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#endif /* __CONFIGS_BG0900_H__ */
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