forked from rrcarlosr/Jetpack
78 lines
2.1 KiB
C
78 lines
2.1 KiB
C
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/*
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* Exynos pinctrl driver header.
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* Copyright (C) 2016 Samsung Electronics
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* Thomas Abraham <thomas.ab@samsung.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __PINCTRL_EXYNOS_H_
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#define __PINCTRL_EXYNOS__H_
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#define PIN_CON 0x00 /* Offset of pin function register */
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#define PIN_DAT 0x04 /* Offset of pin data register */
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#define PIN_PUD 0x08 /* Offset of pin pull up/down config register */
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#define PIN_DRV 0x0C /* Offset of pin drive strength register */
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/**
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* struct samsung_pin_bank_data: represent a controller pin-bank data.
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* @offset: starting offset of the pin-bank registers.
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* @nr_pins: number of pins included in this bank.
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* @name: name to be prefixed for each pin in this pin bank.
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*/
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struct samsung_pin_bank_data {
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u32 offset;
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u8 nr_pins;
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const char *name;
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};
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#define EXYNOS_PIN_BANK(pins, reg, id) \
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{ \
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.offset = reg, \
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.nr_pins = pins, \
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.name = id \
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}
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/**
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* struct samsung_pin_ctrl: represent a pin controller.
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* @pin_banks: list of pin banks included in this controller.
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* @nr_banks: number of pin banks.
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*/
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struct samsung_pin_ctrl {
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const struct samsung_pin_bank_data *pin_banks;
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u32 nr_banks;
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};
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/**
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* struct exynos_pinctrl_priv: exynos pin controller driver private data
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* @pin_ctrl: pin controller bank information.
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* @base: base address of the pin controller instance.
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* @num_banks: number of pin banks included in the pin controller.
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*/
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struct exynos_pinctrl_priv {
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const struct samsung_pin_ctrl *pin_ctrl;
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unsigned long base;
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int num_banks;
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};
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/**
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* struct exynos_pinctrl_config_data: configuration for a peripheral.
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* @offset: offset of the config registers in the controller.
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* @mask: value of the register to be masked with.
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* @value: new value to be programmed.
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*/
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struct exynos_pinctrl_config_data {
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const unsigned int offset;
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const unsigned int mask;
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const unsigned int value;
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};
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void exynos_pinctrl_setup_peri(struct exynos_pinctrl_config_data *conf,
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unsigned int num_conf, unsigned long base);
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int exynos_pinctrl_set_state(struct udevice *dev,
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struct udevice *config);
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int exynos_pinctrl_probe(struct udevice *dev);
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#endif /* __PINCTRL_EXYNOS_H_ */
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