forked from rrcarlosr/Jetpack
307 lines
8.3 KiB
C
307 lines
8.3 KiB
C
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/*
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* Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* NVIDIA CORPORATION and its licensors retain all intellectual property
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* and proprietary rights in and to this software, related documentation
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* and any modifications thereto. Any use, reproduction, disclosure or
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* distribution of this software and related documentation without an express
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* license agreement from NVIDIA CORPORATION is strictly prohibited.
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*/
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#ifndef INCLUDE_CAMRTC_ISP5_TILING_H
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#define INCLUDE_CAMRTC_ISP5_TILING_H
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#include "camrtc-common.h"
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#include "camrtc-capture.h"
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struct isp5_tile_width {
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uint16_t tile_width_first;
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uint16_t tile_width_middle;
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uint16_t tiles_in_slice;
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};
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struct isp5_slice_height {
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uint16_t slice_height;
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uint16_t vi_first_slice_height;
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uint16_t slices_in_image;
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};
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#define ISP5_MIN_TILE_WIDTH U16_C(128)
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#define ISP5_MAX_TILE_WIDTH U16_C(1024)
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#define ISP5_MIN_SLICE_HEIGHT U16_C(128)
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#define ISP5_MAX_SLICE_HEIGHT U16_C(540)
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static inline uint16_t isp5_min_u16(uint16_t a, uint16_t b)
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{
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if (a < b)
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return a;
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else
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return b;
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}
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static inline uint16_t isp5_max_u16(uint16_t a, uint16_t b)
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{
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if (a > b)
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return a;
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else
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return b;
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}
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static inline uint16_t isp5_align_down(uint16_t val, uint16_t alignment)
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{
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uint16_t rem = val % alignment;
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return (rem > 0U) ? (val - rem) : val;
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}
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static inline uint16_t isp5_align_up(uint16_t val, uint16_t alignment)
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{
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uint16_t rem = val % alignment;
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return (rem > 0U) ? (isp5_align_down(val, alignment) + alignment) : val;
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}
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static inline uint16_t isp5_div_round_up(uint16_t x, uint16_t y)
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{
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return (x + y - 1U) / y;
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}
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/**
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* Calculate suitable tile width for given capture descriptor and ISP program
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*/
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__attribute__((unused))
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static bool isp5_find_tile_width(const struct isp5_program *prg,
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const struct isp_capture_descriptor *cd,
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struct isp5_tile_width *tiling)
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{
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const uint16_t img_width = cd->surface_configs.mr_width;
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const uint16_t alignment = prg->overfetch.alignment;
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if (img_width <= ISP5_MAX_TILE_WIDTH) {
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tiling->tile_width_first = img_width;
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tiling->tile_width_middle = 0U;
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tiling->tiles_in_slice = 1;
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return true;
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}
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if (alignment == 0) {
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return false;
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}
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const uint16_t max_width_first = isp5_align_down(ISP5_MAX_TILE_WIDTH -
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prg->overfetch.right +
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prg->overfetch.pru_ovf_h, alignment) -
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prg->overfetch.right + prg->overfetch.pru_ovf_h;
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const uint16_t max_width_middle = isp5_align_down(ISP5_MAX_TILE_WIDTH -
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prg->overfetch.right -
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prg->overfetch.left,
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alignment);
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/* Last tile right edge does not need to be aligned */
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const uint16_t max_width_last = ISP5_MAX_TILE_WIDTH - prg->overfetch.left;
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const uint16_t min_width = isp5_max_u16(ISP5_MIN_TILE_WIDTH, prg->overfetch.right);
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uint16_t tile_count = 2;
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if (img_width > max_width_first + max_width_last) {
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const uint16_t pixels_left = img_width - max_width_first - max_width_last;
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const uint16_t middle_tiles = isp5_div_round_up(pixels_left,
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isp5_min_u16(max_width_middle, max_width_first));
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tile_count += middle_tiles;
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}
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/* Divide image into roughly evenly spaced aligned tiles */
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uint16_t tile_width = (isp5_div_round_up(img_width, alignment) / tile_count) * alignment;
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/*
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* The right edge of a tile as seen by AP must be aligned
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* correctly for CAR filter. When first tile width fulfills
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* this condition, the rest of tiles are simple to andle by
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* just aligning their active width
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*/
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uint16_t first_width = isp5_min_u16(max_width_first,
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isp5_align_down(
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tile_width + prg->overfetch.right -
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prg->overfetch.pru_ovf_h, alignment) -
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prg->overfetch.right + prg->overfetch.pru_ovf_h);
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uint16_t middle_width = (tile_count > 2) ? isp5_min_u16(max_width_middle, tile_width) : 0U;
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uint16_t last_width = img_width - first_width - (tile_count - 2) * middle_width;
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/*
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* Ensure that last tile is wide enough. Width of the first
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* tile a this point is guaranteed to be greater than:
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*
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* ((max_tile_width - total overfetch - 2*alignment) / 2) - alignment >= 407 pixels
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*
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* So there is no risk that this correction will cause it to
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* be too narrow.
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*/
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if (last_width < min_width) {
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uint16_t corr = isp5_align_up(min_width-last_width, alignment);
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first_width -= corr;
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last_width += corr;
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} else if (last_width > max_width_last) {
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const uint16_t corr = last_width - max_width_last;
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/* Try first increasing middle tile width */
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if (tile_count > 2) {
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const uint16_t max_middle_corr = max_width_middle - middle_width;
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const uint16_t middle_corr =
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isp5_min_u16(max_middle_corr,
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isp5_align_up(isp5_div_round_up(corr, tile_count-2),
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alignment));
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middle_width += middle_corr;
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last_width -= middle_corr * (tile_count-2);
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}
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if (last_width > max_width_last) {
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const uint16_t first_corr = isp5_align_up(last_width - max_width_last, alignment);
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first_width += first_corr;
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last_width -= first_corr;
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}
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}
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if (first_width < min_width) {
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return false;
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}
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if (first_width > max_width_first) {
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return false;
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}
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if (last_width < min_width) {
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return false;
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}
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if (last_width > max_width_last) {
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return false;
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}
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if (tile_count > 2U) {
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if (middle_width < min_width) {
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return false;
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}
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if (middle_width > max_width_middle) {
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return false;
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}
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}
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tiling->tile_width_first = first_width;
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tiling->tile_width_middle = middle_width;
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tiling->tiles_in_slice = tile_count;
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return true;
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}
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__attribute__((unused))
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static bool isp5_find_tile_width_dpcm(const struct isp5_program *prg,
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const struct isp_capture_descriptor *cd,
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struct isp5_tile_width *tiling)
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{
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const uint16_t alignment = isp5_max_u16(prg->overfetch.alignment, 8);
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if (alignment == 0) {
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return false;
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}
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const uint16_t max_width_first = isp5_align_down(ISP5_MAX_TILE_WIDTH - prg->overfetch.right,
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alignment);
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const uint16_t max_width_middle = isp5_align_down(ISP5_MAX_TILE_WIDTH - prg->overfetch.right -
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prg->overfetch.left,
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alignment);
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const uint16_t max_width_last = ISP5_MAX_TILE_WIDTH - prg->overfetch.left;
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const uint16_t min_width = isp5_max_u16(ISP5_MIN_TILE_WIDTH, prg->overfetch.right);
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if (cd->surface_configs.chunk_width_middle > max_width_middle) {
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return false;
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}
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tiling->tile_width_middle = cd->surface_configs.chunk_width_middle;
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/*
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* Width of first tile must set so that left overfetch area of
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* 2nd tile fits into 2nd chunk.
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*/
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tiling->tile_width_first = isp5_align_up(cd->surface_configs.chunk_width_first +
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prg->overfetch.left +
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prg->overfetch.right -
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prg->overfetch.pru_ovf_h, alignment) -
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prg->overfetch.right +
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prg->overfetch.pru_ovf_h;
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if (tiling->tile_width_first < min_width) {
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return false;
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}
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if (tiling->tile_width_first > max_width_first) {
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return false;
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}
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if (tiling->tile_width_first + prg->overfetch.right >
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cd->surface_configs.chunk_width_first + cd->surface_configs.chunk_overfetch_width) {
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return false;
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}
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tiling->tiles_in_slice = 1U + isp5_div_round_up(cd->surface_configs.mr_width -
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cd->surface_configs.chunk_width_first,
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cd->surface_configs.chunk_width_middle);
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const uint16_t last_width = cd->surface_configs.mr_width -
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tiling->tile_width_first -
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(tiling->tiles_in_slice - 1) * tiling->tile_width_middle;
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if (last_width < min_width) {
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return false;
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}
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if (last_width > max_width_last) {
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return false;
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}
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return true;
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}
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__attribute__((unused))
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static bool isp5_find_slice_height(uint16_t img_height,
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struct isp5_slice_height *slicing)
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{
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if (img_height < ISP5_MIN_SLICE_HEIGHT) {
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return false;
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}
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if (img_height % 2 != 0U) {
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return false;
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}
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if (img_height <= ISP5_MAX_SLICE_HEIGHT) {
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slicing->slices_in_image = U16_C(1);
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slicing->slice_height = img_height;
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slicing->vi_first_slice_height = img_height;
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return true;
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}
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uint16_t slice_height = ISP5_MAX_SLICE_HEIGHT;
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uint16_t slice_count = isp5_div_round_up(img_height, ISP5_MAX_SLICE_HEIGHT);
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uint16_t last_height = img_height - ISP5_MAX_SLICE_HEIGHT * (slice_count - 1);
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if (last_height < ISP5_MIN_SLICE_HEIGHT) {
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const uint16_t corr = ISP5_MIN_SLICE_HEIGHT - last_height;
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const uint16_t slice_corr = isp5_align_up(isp5_div_round_up(corr, slice_count - 1), 2U);
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slice_height -= slice_corr;
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}
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slicing->slice_height = slice_height;
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slicing->slices_in_image = slice_count;
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slicing->vi_first_slice_height = (slice_count == 1U) ? slice_height : slice_height + 18U;
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return true;
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}
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#endif /* INCLUDE_CAMRTC_ISP5_TILING_H */
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