forked from rrcarlosr/Jetpack
503 lines
11 KiB
C
503 lines
11 KiB
C
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/*
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* mods_dma.c - This file is part of NVIDIA MODS kernel driver.
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*
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* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
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*
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* NVIDIA MODS kernel driver is free software: you can redistribute it and/or
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* modify it under the terms of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* NVIDIA MODS kernel driver is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with NVIDIA MODS kernel driver.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/uaccess.h>
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#include <linux/dmaengine.h>
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#include "mods_internal.h"
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#define MODS_DMA_MAX_CHANNEL 32
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struct mods_dma_chan_info {
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rwlock_t lock;
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bool in_use;
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u32 id;
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struct dma_chan *pch;
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bool should_notify;
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};
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static DECLARE_BITMAP(dma_info_mask, MODS_DMA_MAX_CHANNEL);
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static struct mods_dma_chan_info dma_info_chan_list[MODS_DMA_MAX_CHANNEL];
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static DEFINE_SPINLOCK(dma_info_lock);
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int mods_get_dma_id(u32 *p_id)
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{
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u32 id;
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spin_lock(&dma_info_lock);
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id = find_first_zero_bit(dma_info_mask, MODS_DMA_MAX_CHANNEL);
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if (id >= MODS_DMA_MAX_CHANNEL) {
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spin_unlock(&dma_info_lock);
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return -ENOSPC;
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}
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set_bit(id, dma_info_mask);
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spin_unlock(&dma_info_lock);
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*p_id = id;
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return OK;
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}
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void mods_release_dma_id(u32 id)
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{
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spin_lock(&dma_info_lock);
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clear_bit(id, dma_info_mask);
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spin_unlock(&dma_info_lock);
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}
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int mods_get_chan_by_id(u32 id, struct mods_dma_chan_info **p_dma_chan)
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{
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if (id > MODS_DMA_MAX_CHANNEL)
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return -ERANGE;
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*p_dma_chan = &dma_info_chan_list[id];
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return OK;
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}
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int mods_init_dma(void)
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{
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struct mods_dma_chan_info *p_chan_info;
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int i;
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for (i = 0; i < MODS_DMA_MAX_CHANNEL; i++) {
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p_chan_info = &dma_info_chan_list[i];
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rwlock_init(&(p_chan_info->lock));
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p_chan_info->in_use = false;
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}
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return OK;
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}
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void mods_release_channel(u32 id)
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{
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struct mods_dma_chan_info *p_mods_chan;
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struct dma_chan *pch = 0;
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if (mods_get_chan_by_id(id, &p_mods_chan) != OK) {
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mods_error_printk("get dma channel failed, id %d\n", id);
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return;
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}
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write_lock(&(p_mods_chan->lock));
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if (p_mods_chan->in_use) {
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pch = p_mods_chan->pch;
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p_mods_chan->pch = NULL;
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mods_release_dma_id(id);
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p_mods_chan->in_use = false;
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}
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write_unlock(&(p_mods_chan->lock));
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/* do not call this when hold spin lock */
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if (pch) {
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dmaengine_terminate_all(pch);
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dma_release_channel(pch);
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}
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}
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void mods_exit_dma(void)
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{
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int i;
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for (i = 0; i < MODS_DMA_MAX_CHANNEL; i++)
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mods_release_channel(i);
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}
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bool mods_chan_is_inuse(struct mods_dma_chan_info *p_mods_chan)
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{
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bool in_use = false;
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read_lock(&(p_mods_chan->lock));
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if (p_mods_chan->in_use)
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in_use = true;
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read_unlock(&(p_mods_chan->lock));
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return in_use;
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}
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int mods_get_inuse_chan_by_handle(struct MODS_DMA_HANDLE *p_handle,
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struct mods_dma_chan_info **p_mods_chan)
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{
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int ret;
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bool in_use;
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struct mods_dma_chan_info *p_mods_ch;
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ret = mods_get_chan_by_id(p_handle->dma_id, &p_mods_ch);
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if (ret != OK) {
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mods_error_printk("get dma channel failed, id %d\n",
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p_handle->dma_id);
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return -ENODEV;
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}
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in_use = mods_chan_is_inuse(p_mods_ch);
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if (!in_use) {
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mods_error_printk("invalid dma channel: %d, not in use\n",
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p_handle->dma_id);
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return -EINVAL;
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}
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*p_mods_chan = p_mods_ch;
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return OK;
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}
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int mods_dma_sync_wait(struct MODS_DMA_HANDLE *p_handle,
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mods_dma_cookie_t cookie)
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{
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int ret = OK;
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struct mods_dma_chan_info *p_mods_chan;
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ret = mods_get_inuse_chan_by_handle(p_handle, &p_mods_chan);
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if (ret != OK)
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return ret;
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mods_debug_printk(DEBUG_TEGRADMA,
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"Wait on chan: %p\n", p_mods_chan->pch);
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read_lock(&(p_mods_chan->lock));
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if (dma_sync_wait(p_mods_chan->pch, cookie) != DMA_COMPLETE)
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ret = -1;
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read_unlock(&(p_mods_chan->lock));
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return ret;
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}
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int mods_dma_async_is_tx_complete(struct MODS_DMA_HANDLE *p_handle,
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mods_dma_cookie_t cookie,
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__u32 *p_is_complete)
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{
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int ret = OK;
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struct mods_dma_chan_info *p_mods_chan;
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enum dma_status status;
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ret = mods_get_inuse_chan_by_handle(p_handle, &p_mods_chan);
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if (ret != OK)
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return ret;
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read_lock(&(p_mods_chan->lock));
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status = dma_async_is_tx_complete(p_mods_chan->pch, cookie, NULL, NULL);
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read_unlock(&(p_mods_chan->lock));
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if (status == DMA_COMPLETE)
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*p_is_complete = true;
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else if (status == DMA_IN_PROGRESS)
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*p_is_complete = false;
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else
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ret = -EINVAL;
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return ret;
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}
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int esc_mods_dma_request_channel(struct file *pfile,
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struct MODS_DMA_HANDLE *p_handle)
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{
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struct dma_chan *chan;
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struct mods_dma_chan_info *p_mods_chan;
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dma_cap_mask_t mask;
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u32 id;
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int ret;
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LOG_ENT();
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ret = mods_get_dma_id(&id);
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if (ret != OK) {
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mods_error_printk("no dma handle available\n");
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return ret;
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}
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ret = mods_get_chan_by_id(id, &p_mods_chan);
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if (ret != OK) {
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mods_error_printk("get dma channel failed\n");
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return ret;
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}
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read_lock(&(p_mods_chan->lock));
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if (p_mods_chan->in_use) {
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mods_error_printk("mods dma channel in use\n");
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read_unlock(&(p_mods_chan->lock));
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return -EBUSY;
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}
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read_unlock(&(p_mods_chan->lock));
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dma_cap_zero(mask);
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dma_cap_set(p_handle->dma_type, mask);
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chan = dma_request_channel(mask, NULL, NULL);
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if (!chan) {
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mods_error_printk("Dma channel is not available\n");
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mods_release_dma_id(id);
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return -EBUSY;
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}
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write_lock(&(p_mods_chan->lock));
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p_mods_chan->pch = chan;
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p_mods_chan->in_use = true;
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write_unlock(&(p_mods_chan->lock));
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p_handle->dma_id = id;
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mods_debug_printk(DEBUG_TEGRADMA,
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"request get dma id: %d\n", id);
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LOG_EXT();
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return 0;
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}
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int esc_mods_dma_release_channel(struct file *pfile,
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struct MODS_DMA_HANDLE *p_handle)
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{
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mods_release_channel(p_handle->dma_id);
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return OK;
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}
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int esc_mods_dma_set_config(struct file *pfile,
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struct MODS_DMA_CHANNEL_CONFIG *p_config)
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{
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struct dma_slave_config config;
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struct mods_dma_chan_info *p_mods_chan;
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int ret;
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LOG_ENT();
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ret = mods_get_inuse_chan_by_handle(&p_config->handle, &p_mods_chan);
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if (ret != OK)
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return ret;
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config.direction = p_config->direction;
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config.src_addr = p_config->src_addr;
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config.dst_addr = p_config->dst_addr;
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config.src_addr_width = p_config->src_addr_width;
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config.dst_addr_width = p_config->dst_addr_width;
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config.src_maxburst = p_config->src_maxburst;
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config.dst_maxburst = p_config->dst_maxburst;
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config.device_fc = (p_config->device_fc == 0) ? false : true;
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config.slave_id = p_config->slave_id;
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mods_debug_printk(DEBUG_TEGRADMA,
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"ch: %d dir [%d], addr[%p -> %p], burst [%d %d]",
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p_config->handle.dma_id,
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config.direction,
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(void *)config.src_addr, (void *)config.dst_addr,
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config.src_maxburst, config.dst_maxburst);
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mods_debug_printk(DEBUG_TEGRADMA,
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"width [%d %d] slave id %d\n",
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config.src_addr_width, config.dst_addr_width,
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config.slave_id);
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write_lock(&(p_mods_chan->lock));
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ret = dmaengine_slave_config(p_mods_chan->pch, &config);
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write_unlock(&(p_mods_chan->lock));
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LOG_EXT();
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return ret;
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}
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int esc_mods_dma_submit_request(struct file *pfile,
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struct MODS_DMA_TX_DESC *p_mods_desc)
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{
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int ret = OK;
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struct mods_dma_chan_info *p_mods_chan;
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struct dma_async_tx_descriptor *desc;
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struct dma_device *dev;
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enum dma_ctrl_flags flags;
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mods_dma_cookie_t cookie = 0;
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LOG_ENT();
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flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
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ret = mods_get_inuse_chan_by_handle(&p_mods_desc->handle, &p_mods_chan);
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if (ret != OK)
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return ret;
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if (p_mods_desc->mode != MODS_DMA_SINGLE) {
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mods_error_printk("Unsupported Mode: %d\n", p_mods_desc->mode);
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return -EINVAL;
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}
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mods_debug_printk(DEBUG_TEGRADMA,
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"Submit on chan %p\n", p_mods_chan->pch);
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write_lock(&(p_mods_chan->lock));
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if (p_mods_desc->data_dir == MODS_DMA_MEM_TO_MEM) {
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dev = p_mods_chan->pch->device;
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desc = dev->device_prep_dma_memcpy(
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p_mods_chan->pch,
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p_mods_desc->phys,
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p_mods_desc->phys_2,
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p_mods_desc->length,
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flags);
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} else {
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mods_debug_printk(DEBUG_TEGRADMA,
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"Phys Addr [%p], len [%d], dir [%d]\n",
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(void *)p_mods_desc->phys,
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p_mods_desc->length,
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p_mods_desc->data_dir);
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desc = dmaengine_prep_slave_single(
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p_mods_chan->pch,
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p_mods_desc->phys,
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p_mods_desc->length,
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p_mods_desc->data_dir,
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flags);
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}
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if (desc == NULL) {
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mods_error_printk("Not able to get desc for Tx\n");
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ret = -EIO;
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goto failed;
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}
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desc->callback = NULL;
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desc->callback_param = NULL;
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cookie = dmaengine_submit(desc);
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failed:
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write_unlock(&(p_mods_chan->lock));
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if (dma_submit_error(cookie)) {
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mods_info_printk("Submit cookie: %x Error\n", cookie);
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return -EIO;
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}
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p_mods_desc->cookie = cookie;
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LOG_EXT();
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return ret;
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}
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int esc_mods_dma_async_issue_pending(struct file *pfile,
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struct MODS_DMA_HANDLE *p_handle)
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{
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int ret = OK;
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struct mods_dma_chan_info *p_mods_chan;
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LOG_ENT();
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ret = mods_get_inuse_chan_by_handle(p_handle, &p_mods_chan);
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if (ret != OK)
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return ret;
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mods_debug_printk(DEBUG_TEGRADMA,
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"Issue pending on chan: %p\n", p_mods_chan->pch);
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read_lock(&(p_mods_chan->lock));
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dma_async_issue_pending(p_mods_chan->pch);
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read_unlock(&(p_mods_chan->lock));
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LOG_EXT();
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return ret;
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}
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int esc_mods_dma_wait(struct file *pfile,
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struct MODS_DMA_WAIT_DESC *p_wait_desc)
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{
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int ret;
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LOG_ENT();
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if (p_wait_desc->type == MODS_DMA_SYNC_WAIT)
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ret = mods_dma_sync_wait(&p_wait_desc->handle,
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p_wait_desc->cookie);
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else if (p_wait_desc->type == MODS_DMA_ASYNC_WAIT)
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ret = mods_dma_async_is_tx_complete(&p_wait_desc->handle,
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p_wait_desc->cookie,
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&p_wait_desc->tx_complete);
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else
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ret = -EINVAL;
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LOG_EXT();
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return ret;
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}
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int esc_mods_dma_alloc_coherent(struct file *fp,
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struct MODS_DMA_COHERENT_MEM_HANDLE *p)
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{
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dma_addr_t p_phys_addr;
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void *p_cpu_addr;
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LOG_ENT();
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p_cpu_addr = dma_alloc_coherent(NULL,
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p->num_bytes,
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&p_phys_addr,
|
||
|
GFP_KERNEL);
|
||
|
|
||
|
mods_debug_printk(DEBUG_MEM,
|
||
|
"%s:num_bytes=%d, p_cpu_addr=%p, p_phys_addr=%p\n",
|
||
|
__func__,
|
||
|
p->num_bytes,
|
||
|
(void *)p_cpu_addr,
|
||
|
(void *)p_phys_addr);
|
||
|
|
||
|
if (!p_cpu_addr) {
|
||
|
mods_error_printk(
|
||
|
"%s:FAILED!!!num_bytes=%d, p_cpu_addr=%p, p_phys_addr=%p\n",
|
||
|
__func__,
|
||
|
p->num_bytes,
|
||
|
(void *)p_cpu_addr,
|
||
|
(void *)p_phys_addr);
|
||
|
LOG_EXT();
|
||
|
return -1;
|
||
|
}
|
||
|
|
||
|
memset(p_cpu_addr, 0x00, p->num_bytes);
|
||
|
|
||
|
p->memory_handle_phys = (u64)p_phys_addr;
|
||
|
p->memory_handle_virt = (u64)p_cpu_addr;
|
||
|
|
||
|
LOG_EXT();
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
int esc_mods_dma_free_coherent(struct file *fp,
|
||
|
struct MODS_DMA_COHERENT_MEM_HANDLE *p)
|
||
|
{
|
||
|
LOG_ENT();
|
||
|
|
||
|
mods_debug_printk(DEBUG_MEM,
|
||
|
"%s : num_bytes = %d, p_cpu_addr=%p, p_phys_addr=%p\n",
|
||
|
__func__,
|
||
|
p->num_bytes,
|
||
|
(void *)(p->memory_handle_virt),
|
||
|
(void *)(p->memory_handle_phys));
|
||
|
|
||
|
dma_free_coherent(NULL,
|
||
|
p->num_bytes,
|
||
|
(void *)(p->memory_handle_virt),
|
||
|
(dma_addr_t)(p->memory_handle_phys));
|
||
|
|
||
|
p->memory_handle_phys = (u64)0;
|
||
|
p->memory_handle_virt = (u64)0;
|
||
|
|
||
|
LOG_EXT();
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
int esc_mods_dma_copy_to_user(struct file *fp,
|
||
|
struct MODS_DMA_COPY_TO_USER *p)
|
||
|
{
|
||
|
int retval;
|
||
|
|
||
|
LOG_ENT();
|
||
|
|
||
|
mods_debug_printk(DEBUG_MEM,
|
||
|
"%s:memory_handle_dst=%p, memory_handle_src=%p, num_bytes=%d\n",
|
||
|
__func__,
|
||
|
(void *)(p->memory_handle_dst),
|
||
|
(void *)(p->memory_handle_src),
|
||
|
p->num_bytes);
|
||
|
|
||
|
retval = copy_to_user((void *)(p->memory_handle_dst),
|
||
|
(void *)(p->memory_handle_src),
|
||
|
p->num_bytes);
|
||
|
|
||
|
LOG_EXT();
|
||
|
|
||
|
return retval;
|
||
|
}
|