forked from rrcarlosr/Jetpack
102 lines
2.5 KiB
Plaintext
102 lines
2.5 KiB
Plaintext
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/*
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* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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*/
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/ {
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aon: aon@c160000 {
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compatible = "nvidia,tegra186-aon";
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status = "disabled";
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reg = <0x0 0x0c1a0000 0x0 0x40000>; /* AON shared semaphore */
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#mbox-cells = <1>;
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iommus = <&smmu TEGRA_SID_AON>;
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nvidia,hsp-shared-mailbox = <&aon_hsp 2>;
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nvidia,hsp-shared-mailbox-names = "ivc-pair";
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nvidia,ivc-carveout-base-ss = <0>;
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nvidia,ivc-carveout-size-ss = <1>;
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nvidia,ivc-rx-ss = <2>;
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nvidia,ivc-tx-ss = <3>;
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nvidia,ivc-dbg-enable-ss = <0>;
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ivc-channels@80000000 {
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#address-cells = <1>;
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#size-cells = <0>;
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ivc_aon_echo@0 {
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reg = <0x0000>, <0x10000>;
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reg-names = "rx", "tx";
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nvidia,frame-count = <16>;
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nvidia,frame-size = <64>;
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};
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ivc_aon_aondbg@480 {
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reg = <0x0480>, <0x10480>;
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reg-names = "rx", "tx";
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nvidia,frame-count = <2>;
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nvidia,frame-size = <128>;
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};
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ivc_aon_spi@600 {
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reg = <0x0600>, <0x10600>;
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reg-names = "rx", "tx";
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nvidia,frame-count = <2>;
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nvidia,frame-size = <24704>;
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};
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ivc_can0@c780 {
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reg = <0xc780>, <0x1c780>;
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reg-names = "rx", "tx";
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nvidia,frame-count = <16>;
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nvidia,frame-size = <128>;
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};
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ivc_can1@d000 {
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reg = <0xd000>, <0x1d000>;
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reg-names = "rx", "tx";
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nvidia,frame-count = <16>;
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nvidia,frame-size = <128>;
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};
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ivc_aon_shub@d880 {
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reg = <0xd880>, <0x1d880>;
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reg-names = "rx", "tx";
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nvidia,frame-count = <4>;
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nvidia,frame-size = <256>;
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};
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};
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};
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aondbg {
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compatible = "nvidia,tegra186-aondbg";
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mboxes = <&aon 1>;
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};
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mttcan0-ivc {
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compatible = "bosch,mttcan-ivc";
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mboxes = <&aon 3>;
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status = "disabled";
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};
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mttcan1-ivc {
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compatible = "bosch,mttcan-ivc";
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mboxes = <&aon 4>;
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status = "disabled";
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};
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aon_shub {
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status = "disabled";
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compatible = "nvidia,tegra186_aon_shub";
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mboxes = <&aon 5>;
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};
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};
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