forked from rrcarlosr/Jetpack
379 lines
10 KiB
C
379 lines
10 KiB
C
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/*
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* (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
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* (C) Copyright 2013 Xilinx, Inc.
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*
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* Common configuration options for all Zynq boards.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_ZYNQ_COMMON_H
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#define __CONFIG_ZYNQ_COMMON_H
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/* CPU clock */
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#ifndef CONFIG_CPU_FREQ_HZ
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# define CONFIG_CPU_FREQ_HZ 800000000
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#endif
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/* Cache options */
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#define CONFIG_SYS_CACHELINE_SIZE 32
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#define CONFIG_SYS_L2CACHE_OFF
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#ifndef CONFIG_SYS_L2CACHE_OFF
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# define CONFIG_SYS_L2_PL310
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# define CONFIG_SYS_PL310_BASE 0xf8f02000
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#endif
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#define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600
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#define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR
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#define CONFIG_SYS_TIMER_COUNTS_DOWN
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#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
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/* Serial drivers */
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#define CONFIG_BAUDRATE 115200
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/* The following table includes the supported baudrates */
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#define CONFIG_SYS_BAUDRATE_TABLE \
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{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
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#define CONFIG_ARM_DCC
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#define CONFIG_ZYNQ_SERIAL
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/* Ethernet driver */
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#if defined(CONFIG_ZYNQ_GEM)
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# define CONFIG_MII
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# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
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# define CONFIG_PHY_MARVELL
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# define CONFIG_PHY_REALTEK
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# define CONFIG_PHY_XILINX
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# define CONFIG_BOOTP_SERVERIP
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# define CONFIG_BOOTP_BOOTPATH
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# define CONFIG_BOOTP_GATEWAY
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# define CONFIG_BOOTP_HOSTNAME
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# define CONFIG_BOOTP_MAY_FAIL
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#endif
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/* SPI */
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#ifdef CONFIG_ZYNQ_SPI
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#endif
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/* QSPI */
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#ifdef CONFIG_ZYNQ_QSPI
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# define CONFIG_SF_DEFAULT_SPEED 30000000
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# define CONFIG_SPI_FLASH_ISSI
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#endif
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/* NOR */
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#ifndef CONFIG_SYS_NO_FLASH
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# define CONFIG_SYS_FLASH_BASE 0xE2000000
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# define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024)
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# define CONFIG_SYS_MAX_FLASH_BANKS 1
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# define CONFIG_SYS_MAX_FLASH_SECT 512
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# define CONFIG_SYS_FLASH_ERASE_TOUT 1000
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# define CONFIG_SYS_FLASH_WRITE_TOUT 5000
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# define CONFIG_FLASH_SHOW_PROGRESS 10
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# define CONFIG_SYS_FLASH_CFI
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# undef CONFIG_SYS_FLASH_EMPTY_INFO
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# define CONFIG_FLASH_CFI_DRIVER
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# undef CONFIG_SYS_FLASH_PROTECTION
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# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
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#endif
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/* MMC */
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#if defined(CONFIG_ZYNQ_SDHCI)
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# define CONFIG_MMC
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# define CONFIG_GENERIC_MMC
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# define CONFIG_SDHCI
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# define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
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#endif
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#ifdef CONFIG_ZYNQ_USB
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# define CONFIG_USB_EHCI
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# define CONFIG_USB_STORAGE
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# define CONFIG_USB_EHCI_ZYNQ
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# define CONFIG_EHCI_IS_TDI
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# define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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# define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000
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# define DFU_DEFAULT_POLL_TIMEOUT 300
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# define CONFIG_USB_FUNCTION_DFU
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# define CONFIG_DFU_RAM
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# define CONFIG_USB_CABLE_CHECK
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# define CONFIG_CMD_THOR_DOWNLOAD
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# define CONFIG_THOR_RESET_OFF
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# define CONFIG_USB_FUNCTION_THOR
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# define DFU_ALT_INFO_RAM \
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"dfu_ram_info=" \
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"set dfu_alt_info " \
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"${kernel_image} ram 0x3000000 0x500000\\\\;" \
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"${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
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"${ramdisk_image} ram 0x2000000 0x600000\0" \
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"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
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"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
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# if defined(CONFIG_ZYNQ_SDHCI)
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# define CONFIG_DFU_MMC
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# define DFU_ALT_INFO_MMC \
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"dfu_mmc_info=" \
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"set dfu_alt_info " \
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"${kernel_image} fat 0 1\\\\;" \
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"${devicetree_image} fat 0 1\\\\;" \
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"${ramdisk_image} fat 0 1\0" \
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"dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
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"thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
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# define DFU_ALT_INFO \
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DFU_ALT_INFO_RAM \
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DFU_ALT_INFO_MMC
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# else
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# define DFU_ALT_INFO \
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DFU_ALT_INFO_RAM
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# endif
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#endif
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#if !defined(DFU_ALT_INFO)
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# define DFU_ALT_INFO
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#endif
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#if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQ_USB)
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# define CONFIG_SUPPORT_VFAT
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# define CONFIG_FAT_WRITE
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# define CONFIG_DOS_PARTITION
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#endif
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#if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
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#define CONFIG_SYS_I2C_ZYNQ
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#endif
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/* I2C */
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#if defined(CONFIG_SYS_I2C_ZYNQ)
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# define CONFIG_SYS_I2C
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# define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
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# define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
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#endif
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/* EEPROM */
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#ifdef CONFIG_ZYNQ_EEPROM
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# define CONFIG_CMD_EEPROM
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# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
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# define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
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# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
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# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
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# define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */
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#endif
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/* Total Size of Environment Sector */
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#define CONFIG_ENV_SIZE (128 << 10)
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/* Allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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/* Environment */
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#ifndef CONFIG_ENV_IS_NOWHERE
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# ifndef CONFIG_SYS_NO_FLASH
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/* Environment in NOR flash */
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# define CONFIG_ENV_IS_IN_FLASH
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# elif defined(CONFIG_ZYNQ_QSPI)
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/* Environment in Serial Flash */
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# define CONFIG_ENV_IS_IN_SPI_FLASH
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# elif defined(CONFIG_SYS_NO_FLASH)
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# define CONFIG_ENV_IS_NOWHERE
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# endif
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# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
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# define CONFIG_ENV_OFFSET 0xE0000
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#endif
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/* enable preboot to be loaded before CONFIG_BOOTDELAY */
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#define CONFIG_PREBOOT
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/* Default environment */
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#ifndef CONFIG_EXTRA_ENV_SETTINGS
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"fit_image=fit.itb\0" \
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"load_addr=0x2000000\0" \
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"fit_size=0x800000\0" \
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"flash_off=0x100000\0" \
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"nor_flash_off=0xE2100000\0" \
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"fdt_high=0x20000000\0" \
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"initrd_high=0x20000000\0" \
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"loadbootenv_addr=0x2000000\0" \
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"bootenv=uEnv.txt\0" \
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"bootenv_dev=mmc\0" \
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"loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \
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"importbootenv=echo Importing environment from ${bootenv_dev} ...; " \
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"env import -t ${loadbootenv_addr} $filesize\0" \
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"bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \
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"setbootenv=if env run bootenv_existence_test; then " \
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"if env run loadbootenv; then " \
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"env run importbootenv; " \
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"fi; " \
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"fi; \0" \
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"sd_loadbootenv=set bootenv_dev mmc && " \
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"run setbootenv \0" \
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"usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \
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"preboot=if test $modeboot = sdboot; then " \
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"run sd_loadbootenv; " \
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"echo Checking if uenvcmd is set ...; " \
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"if test -n $uenvcmd; then " \
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"echo Running uenvcmd ...; " \
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"run uenvcmd; " \
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"fi; " \
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"fi; \0" \
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"norboot=echo Copying FIT from NOR flash to RAM... && " \
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"cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
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"bootm ${load_addr}\0" \
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"sdboot=echo Copying FIT from SD to RAM... && " \
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"load mmc 0 ${load_addr} ${fit_image} && " \
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"bootm ${load_addr}\0" \
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"jtagboot=echo TFTPing FIT to RAM... && " \
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"tftpboot ${load_addr} ${fit_image} && " \
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"bootm ${load_addr}\0" \
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"usbboot=if usb start; then " \
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"echo Copying FIT from USB to RAM... && " \
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"load usb 0 ${load_addr} ${fit_image} && " \
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"bootm ${load_addr}; fi\0" \
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DFU_ALT_INFO
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#endif
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#define CONFIG_BOOTCOMMAND "run $modeboot"
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#define CONFIG_SYS_LOAD_ADDR 0 /* default? */
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/* Miscellaneous configurable options */
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_BOARD_LATE_INIT
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CLOCKS
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#define CONFIG_CMD_CLK
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#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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/* Physical Memory map */
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#define CONFIG_SYS_TEXT_BASE 0x4000000
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#ifndef CONFIG_NR_DRAM_BANKS
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# define CONFIG_NR_DRAM_BANKS 1
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#endif
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#define CONFIG_SYS_MEMTEST_START 0
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#define CONFIG_SYS_MEMTEST_END 0x1000
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#define CONFIG_SYS_MALLOC_LEN 0x1400000
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#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
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#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE)
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/* Enable the PL to be downloaded */
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#define CONFIG_FPGA
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#define CONFIG_FPGA_XILINX
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#define CONFIG_FPGA_ZYNQPL
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#define CONFIG_CMD_FPGA_LOADMK
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#define CONFIG_CMD_FPGA_LOADP
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#define CONFIG_CMD_FPGA_LOADBP
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#define CONFIG_CMD_FPGA_LOADFS
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/* FIT support */
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#define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
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/* FDT support */
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#define CONFIG_DISPLAY_BOARDINFO_LATE
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/* Extend size of kernel image for uncompression */
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#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
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/* Boot FreeBSD/vxWorks from an ELF image */
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#define CONFIG_SYS_MMC_MAX_DEVICE 1
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#define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds"
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/* Commands */
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/* SPL part */
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#define CONFIG_CMD_SPL
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SPL_RAM_DEVICE
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#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-zynq/u-boot-spl.lds"
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/* MMC support */
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#ifdef CONFIG_ZYNQ_SDHCI
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#define CONFIG_SPL_MMC_SUPPORT
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
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#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
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#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
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#define CONFIG_SPL_LIBDISK_SUPPORT
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#define CONFIG_SPL_FAT_SUPPORT
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#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
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#endif
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/* Disable dcache for SPL just for sure */
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SYS_DCACHE_OFF
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#undef CONFIG_FPGA
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#endif
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/* Address in RAM where the parameters must be copied by SPL. */
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#define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000
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#define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb"
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#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
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/* Not using MMC raw mode - just for compilation purpose */
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#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0
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#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0
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#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0
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/* qspi mode is working fine */
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#ifdef CONFIG_ZYNQ_QSPI
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#define CONFIG_SPL_SPI_SUPPORT
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#define CONFIG_SPL_SPI_LOAD
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#define CONFIG_SPL_SPI_FLASH_SUPPORT
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#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
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#define CONFIG_SYS_SPI_ARGS_OFFS 0x200000
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#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
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#define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \
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CONFIG_SYS_SPI_ARGS_SIZE)
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#endif
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||
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||
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/* for booting directly linux */
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#define CONFIG_SPL_OS_BOOT
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||
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/* SP location before relocation, must use scratch RAM */
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#define CONFIG_SPL_TEXT_BASE 0x0
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||
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/* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
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#define CONFIG_SPL_MAX_SIZE 0x30000
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||
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/* The highest 64k OCM address */
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#define OCM_HIGH_ADDR 0xffff0000
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||
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/* On the top of OCM space */
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#define CONFIG_SYS_SPL_MALLOC_START OCM_HIGH_ADDR
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000
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||
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/*
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||
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* SPL stack position - and stack goes down
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||
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* 0xfffffe00 is used for putting wfi loop.
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||
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* Set it up as limit for now.
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||
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|
*/
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||
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#define CONFIG_SPL_STACK 0xfffffe00
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||
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||
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|
/* BSS setup */
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||
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#define CONFIG_SPL_BSS_START_ADDR 0x100000
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||
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#define CONFIG_SPL_BSS_MAX_SIZE 0x100000
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||
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||
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#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
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||
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|
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||
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|
#endif /* __CONFIG_ZYNQ_COMMON_H */
|