forked from rrcarlosr/Jetpack
199 lines
7.6 KiB
C
199 lines
7.6 KiB
C
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/*
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* mux.c
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*
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* Pinmux Setting for B&R LEIT Board(s)
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*
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* Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
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* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/mux.h>
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#include <asm/io.h>
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#include <i2c.h>
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static struct module_pin_mux spi0_pin_mux[] = {
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/* SPI1_SCLK */
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{OFFSET(spi0_sclk), MODE(0) | PULLUDEN | RXACTIVE},
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/* SPI1_D0 */
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{OFFSET(spi0_d0), MODE(0) | PULLUDEN | RXACTIVE},
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/* SPI1_D1 */
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{OFFSET(spi0_d1), MODE(0) | PULLUDEN | RXACTIVE},
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/* SPI1_CS0 */
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{OFFSET(spi0_cs0), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE},
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/* SPI1_CS1 */
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{OFFSET(spi0_cs1), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE},
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{-1},
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};
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static struct module_pin_mux dcan0_pin_mux[] = {
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/* DCAN0 TX */
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{OFFSET(uart1_ctsn), MODE(2) | PULLUDEN | PULLUP_EN},
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/* DCAN0 RX */
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{OFFSET(uart1_rtsn), MODE(2) | RXACTIVE},
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{-1},
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};
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static struct module_pin_mux dcan1_pin_mux[] = {
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/* DCAN1 TX */
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{OFFSET(uart1_rxd), MODE(2) | PULLUDEN | PULLUP_EN},
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/* DCAN1 RX */
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{OFFSET(uart1_txd), MODE(2) | RXACTIVE},
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{-1},
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};
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static struct module_pin_mux gpios[] = {
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/* GPIO0_7 (PWW0 OUT) - CAN TERM */
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{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDDIS | RXACTIVE)},
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/* GPIO0_19 (DMA_INTR0) - TA602 */
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{OFFSET(xdma_event_intr0), (MODE(7) | PULLUDDIS | RXACTIVE)},
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/* GPIO0_20 (DMA_INTR1) - SPI0 nCS1 */
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{OFFSET(xdma_event_intr1), (MODE(7) | PULLUDDIS | RXACTIVE)},
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/* GPIO0_29 (RMII1_REFCLK) - eMMC nRST */
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{OFFSET(rmii1_refclk), (MODE(7) | PULLUDDIS)},
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/* GPIO0_30 (GPMC_WAIT0) - TA601 */
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{OFFSET(gpmc_wait0), (MODE(7) | PULLUDDIS | RXACTIVE)},
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/* GPIO0_31 (GPMC_nWP) - SW601 PushButton */
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{OFFSET(gpmc_wpn), (MODE(7) | PULLUDDIS | RXACTIVE)},
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/* GPIO1_28 (GPMC_nWE) - FRAM_nWP */
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{OFFSET(gpmc_be1n), (MODE(7) | PULLUDDIS)},
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/* GPIO1_29 (gpmc_csn0) - MMC nRST */
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{OFFSET(gpmc_csn0), (MODE(7) | PULLUDDIS)},
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/* GPIO2_0 (GPMC_nCS3) - VBAT_OK */
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{OFFSET(gpmc_csn3), (MODE(7) | PULLUDDIS | RXACTIVE) },
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/* GPIO2_2 (GPMC_nADV_ALE) - DCOK */
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{OFFSET(gpmc_advn_ale), (MODE(7) | PULLUDDIS | RXACTIVE)},
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/* GPIO2_4 (GPMC_nWE) - TST_BAST */
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{OFFSET(gpmc_wen), (MODE(7) | PULLUDDIS)},
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/* GPIO2_5 (gpmc_be0n_cle) - DISPLAY_ON_OFF */
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{OFFSET(gpmc_be0n_cle), (MODE(7) | PULLUDDIS)},
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/* GPIO3_16 (mcasp0_axr0) - ETH-LED green */
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{OFFSET(mcasp0_axr0), (MODE(7) | PULLUDDIS | RXACTIVE)},
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/* GPIO3_17 (mcasp0_ahclkr) - CAN_STB */
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{OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDDIS | RXACTIVE)},
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/* GPIO3_18 (MCASP0_ACLKR) - SW601 CNTup, mapped to Counter eQEB0A_in */
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{OFFSET(mcasp0_aclkr), (MODE(1) | PULLUDDIS | RXACTIVE)},
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/* GPIO3_19 (MCASP0_FSR) - SW601 CNTdown, mapped to Counter eQEB0B_in */
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{OFFSET(mcasp0_fsr), (MODE(1) | PULLUDDIS | RXACTIVE)},
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/* GPIO3_20 (MCASP0_AXR1) - SW601 CNTdown, map to Counter eQEB0_index */
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{OFFSET(mcasp0_axr1), (MODE(1) | PULLUDDIS | RXACTIVE)},
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{-1},
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};
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static struct module_pin_mux uart0_pin_mux[] = {
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/* UART0_CTS */
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{OFFSET(uart0_ctsn), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},
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/* UART0_RXD */
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{OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},
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/* UART0_TXD */
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{OFFSET(uart0_txd), (MODE(0) | PULLUDEN)},
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{-1},
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};
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static struct module_pin_mux i2c0_pin_mux[] = {
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/* I2C_DATA */
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{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)},
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/* I2C_SCLK */
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{OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)},
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{-1},
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};
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static struct module_pin_mux mii1_pin_mux[] = {
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{OFFSET(mii1_crs), MODE(0) | RXACTIVE}, /* MII1_CRS */
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{OFFSET(mii1_col), MODE(0) | RXACTIVE}, /* MII1_COL */
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{OFFSET(mii1_rxerr), MODE(0) | RXACTIVE}, /* MII1_RXERR */
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{OFFSET(mii1_txen), MODE(0)}, /* MII1_TXEN */
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{OFFSET(mii1_rxdv), MODE(0) | RXACTIVE}, /* MII1_RXDV */
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{OFFSET(mii1_txd3), MODE(0)}, /* MII1_TXD3 */
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{OFFSET(mii1_txd2), MODE(0)}, /* MII1_TXD2 */
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{OFFSET(mii1_txd1), MODE(0)}, /* MII1_TXD1 */
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{OFFSET(mii1_txd0), MODE(0)}, /* MII1_TXD0 */
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{OFFSET(mii1_txclk), MODE(0) | RXACTIVE}, /* MII1_TXCLK */
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{OFFSET(mii1_rxclk), MODE(0) | RXACTIVE}, /* MII1_RXCLK */
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{OFFSET(mii1_rxd3), MODE(0) | RXACTIVE}, /* MII1_RXD3 */
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{OFFSET(mii1_rxd2), MODE(0) | RXACTIVE}, /* MII1_RXD2 */
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{OFFSET(mii1_rxd1), MODE(0) | RXACTIVE}, /* MII1_RXD1 */
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{OFFSET(mii1_rxd0), MODE(0) | RXACTIVE}, /* MII1_RXD0 */
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{OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */
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{OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
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{-1},
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};
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static struct module_pin_mux mmc1_pin_mux[] = {
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{OFFSET(gpmc_ad7), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT7 */
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{OFFSET(gpmc_ad6), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT6 */
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{OFFSET(gpmc_ad5), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT5 */
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{OFFSET(gpmc_ad4), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT4 */
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{OFFSET(gpmc_ad3), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT3 */
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{OFFSET(gpmc_ad2), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT2 */
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{OFFSET(gpmc_ad1), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT1 */
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{OFFSET(gpmc_ad0), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT0 */
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{OFFSET(gpmc_csn1), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CLK */
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{OFFSET(gpmc_csn2), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CMD */
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{OFFSET(gpmc_csn0), (MODE(7) | RXACTIVE | PULLUP_EN)}, /* MMC1_WP */
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{OFFSET(gpmc_advn_ale), (MODE(7) | RXACTIVE | PULLUP_EN)},/* MMC1_CD */
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{-1},
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};
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static struct module_pin_mux lcd_pin_mux[] = {
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{OFFSET(lcd_data0), (MODE(0) | PULLUDDIS)}, /* LCD-Data(0) */
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{OFFSET(lcd_data1), (MODE(0) | PULLUDDIS)}, /* LCD-Data(1) */
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{OFFSET(lcd_data2), (MODE(0) | PULLUDDIS)}, /* LCD-Data(2) */
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{OFFSET(lcd_data3), (MODE(0) | PULLUDDIS)}, /* LCD-Data(3) */
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{OFFSET(lcd_data4), (MODE(0) | PULLUDDIS)}, /* LCD-Data(4) */
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{OFFSET(lcd_data5), (MODE(0) | PULLUDDIS)}, /* LCD-Data(5) */
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{OFFSET(lcd_data6), (MODE(0) | PULLUDDIS)}, /* LCD-Data(6) */
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{OFFSET(lcd_data7), (MODE(0) | PULLUDDIS)}, /* LCD-Data(7) */
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{OFFSET(lcd_data8), (MODE(0) | PULLUDDIS)}, /* LCD-Data(8) */
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{OFFSET(lcd_data9), (MODE(0) | PULLUDDIS)}, /* LCD-Data(9) */
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{OFFSET(lcd_data10), (MODE(0) | PULLUDDIS)}, /* LCD-Data(10) */
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{OFFSET(lcd_data11), (MODE(0) | PULLUDDIS)}, /* LCD-Data(11) */
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{OFFSET(lcd_data12), (MODE(0) | PULLUDDIS)}, /* LCD-Data(12) */
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{OFFSET(lcd_data13), (MODE(0) | PULLUDDIS)}, /* LCD-Data(13) */
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{OFFSET(lcd_data14), (MODE(0) | PULLUDDIS)}, /* LCD-Data(14) */
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{OFFSET(lcd_data15), (MODE(0) | PULLUDDIS)}, /* LCD-Data(15) */
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{OFFSET(gpmc_ad8), (MODE(1) | PULLUDDIS)}, /* LCD-Data(16) */
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{OFFSET(gpmc_ad9), (MODE(1) | PULLUDDIS)}, /* LCD-Data(17) */
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{OFFSET(gpmc_ad10), (MODE(1) | PULLUDDIS)}, /* LCD-Data(18) */
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{OFFSET(gpmc_ad11), (MODE(1) | PULLUDDIS)}, /* LCD-Data(19) */
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{OFFSET(gpmc_ad12), (MODE(1) | PULLUDDIS)}, /* LCD-Data(20) */
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{OFFSET(gpmc_ad13), (MODE(1) | PULLUDDIS)}, /* LCD-Data(21) */
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{OFFSET(gpmc_ad14), (MODE(1) | PULLUDDIS)}, /* LCD-Data(22) */
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{OFFSET(gpmc_ad15), (MODE(1) | PULLUDDIS)}, /* LCD-Data(23) */
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{OFFSET(lcd_vsync), (MODE(0) | PULLUDDIS)}, /* LCD-VSync */
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{OFFSET(lcd_hsync), (MODE(0) | PULLUDDIS)}, /* LCD-HSync */
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{OFFSET(lcd_ac_bias_en), (MODE(0) | PULLUDDIS)},/* LCD-DE */
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{OFFSET(lcd_pclk), (MODE(0) | PULLUDDIS)}, /* LCD-CLK */
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{-1},
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};
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void enable_uart0_pin_mux(void)
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{
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configure_module_pin_mux(uart0_pin_mux);
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}
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void enable_i2c_pin_mux(void)
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{
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configure_module_pin_mux(i2c0_pin_mux);
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}
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void enable_board_pin_mux(void)
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{
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configure_module_pin_mux(i2c0_pin_mux);
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configure_module_pin_mux(mii1_pin_mux);
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configure_module_pin_mux(spi0_pin_mux);
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configure_module_pin_mux(dcan0_pin_mux);
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configure_module_pin_mux(dcan1_pin_mux);
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configure_module_pin_mux(mmc1_pin_mux);
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configure_module_pin_mux(lcd_pin_mux);
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configure_module_pin_mux(gpios);
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}
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