forked from rrcarlosr/Jetpack
139 lines
2.5 KiB
Plaintext
139 lines
2.5 KiB
Plaintext
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menu "ARC architecture"
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depends on ARC
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config SYS_ARCH
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default "arc"
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config SYS_CPU
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default "arcv1" if ISA_ARCOMPACT
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default "arcv2" if ISA_ARCV2
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choice
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prompt "ARC Instruction Set"
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default ISA_ARCOMPACT
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config ISA_ARCOMPACT
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bool "ARCompact ISA"
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help
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The original ARC ISA of ARC600/700 cores
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config ISA_ARCV2
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bool "ARC ISA v2"
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help
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ISA for the Next Generation ARC-HS cores
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endchoice
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choice
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prompt "CPU selection"
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default CPU_ARC770D if ISA_ARCOMPACT
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default CPU_ARCHS38 if ISA_ARCV2
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config CPU_ARC750D
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bool "ARC 750D"
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select ARC_MMU_V2
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depends on ISA_ARCOMPACT
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help
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Choose this option to build an U-Boot for ARC750D CPU.
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config CPU_ARC770D
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bool "ARC 770D"
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select ARC_MMU_V3
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depends on ISA_ARCOMPACT
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help
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Choose this option to build an U-Boot for ARC770D CPU.
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config CPU_ARCEM6
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bool "ARC EM6"
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select ARC_MMU_ABSENT
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depends on ISA_ARCV2
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help
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Next Generation ARC Core based on ISA-v2 ISA without MMU.
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config CPU_ARCHS36
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bool "ARC HS36"
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select ARC_MMU_ABSENT
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depends on ISA_ARCV2
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help
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Next Generation ARC Core based on ISA-v2 ISA without MMU.
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config CPU_ARCHS38
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bool "ARC HS38"
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select ARC_MMU_V4
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depends on ISA_ARCV2
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help
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Next Generation ARC Core based on ISA-v2 ISA with MMU.
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endchoice
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choice
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prompt "MMU Version"
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default ARC_MMU_V3 if CPU_ARC770D
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default ARC_MMU_V2 if CPU_ARC750D
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default ARC_MMU_ABSENT if CPU_ARCEM6
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default ARC_MMU_ABSENT if CPU_ARCHS36
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default ARC_MMU_V4 if CPU_ARCHS38
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config ARC_MMU_ABSENT
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bool "No MMU"
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help
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No MMU
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config ARC_MMU_V2
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bool "MMU v2"
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depends on CPU_ARC750D
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help
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Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
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when 2 D-TLB and 1 I-TLB entries index into same 2way set.
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config ARC_MMU_V3
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bool "MMU v3"
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depends on CPU_ARC770D
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help
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Introduced with ARC700 4.10: New Features
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Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
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Shared Address Spaces (SASID)
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config ARC_MMU_V4
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bool "MMU v4"
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depends on CPU_ARCHS38
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help
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Introduced as a part of ARC HS38 release.
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endchoice
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config CPU_BIG_ENDIAN
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bool "Enable Big Endian Mode"
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default n
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help
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Build kernel for Big Endian Mode of ARC CPU
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config SYS_ICACHE_OFF
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bool "Do not use Instruction Cache"
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default n
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config SYS_DCACHE_OFF
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bool "Do not use Data Cache"
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default n
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choice
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prompt "Target select"
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default TARGET_AXS101
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config TARGET_TB100
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bool "Support tb100"
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config TARGET_ARCANGEL4
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bool "Support arcangel4"
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config TARGET_AXS101
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bool "Support axs101"
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endchoice
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source "board/abilis/tb100/Kconfig"
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source "board/synopsys/Kconfig"
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source "board/synopsys/axs101/Kconfig"
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endmenu
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