forked from rrcarlosr/Jetpack
83 lines
2.1 KiB
Plaintext
83 lines
2.1 KiB
Plaintext
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/*
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* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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/ {
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p2888_shuntv_offset: shuntv-offset {
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offset = <0>;
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conditional_offset@0 {
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shunt_volt_start = <0xFFFFFFD8>;
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shunt_volt_end = <0xFFFFFFD8>;
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offset = <40>;
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};
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};
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i2c@c240000 {
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ina3221x_40: ina3221x@40 {
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compatible = "ti,ina3221x";
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reg = <0x40>;
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ti,trigger-config = <0x7003>;
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ti,continuous-config = <0x7c07>;
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ti,enable-forced-continuous;
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#address-cells = <1>;
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#size-cells = <0>;
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#io-channel-cells = <1>;
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channel@0 {
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reg = <0x0>;
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ti,rail-name = "GPU";
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ti,shunt-resistor-mohm = <5>;
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shunt-volt-offset-uv = <&p2888_shuntv_offset>;
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};
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channel@1 {
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reg = <0x1>;
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ti,rail-name = "CPU";
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ti,shunt-resistor-mohm = <5>;
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shunt-volt-offset-uv = <&p2888_shuntv_offset>;
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};
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channel@2 {
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reg = <0x2>;
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ti,rail-name = "SOC";
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ti,shunt-resistor-mohm = <5>;
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shunt-volt-offset-uv = <&p2888_shuntv_offset>;
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};
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};
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ina3221x_41: ina3221x@41 {
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compatible = "ti,ina3221x";
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reg = <0x41>;
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ti,trigger-config = <0x7003>;
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ti,continuous-config = <0x7c07>;
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ti,enable-forced-continuous;
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#address-cells = <1>;
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#size-cells = <0>;
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#io-channel-cells = <1>;
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channel@0 {
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reg = <0x0>;
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ti,rail-name = "CV";
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ti,shunt-resistor-mohm = <5>;
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shunt-volt-offset-uv = <&p2888_shuntv_offset>;
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};
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channel@1 {
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reg = <0x1>;
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ti,rail-name = "VDDRQ";
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ti,shunt-resistor-mohm = <5>;
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shunt-volt-offset-uv = <&p2888_shuntv_offset>;
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};
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channel@2 {
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reg = <0x2>;
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ti,rail-name = "SYS5V";
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ti,shunt-resistor-mohm = <5>;
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shunt-volt-offset-uv = <&p2888_shuntv_offset>;
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};
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};
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};
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};
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