Commit Graph

10 Commits

Author SHA1 Message Date
David Sidrane 4836fc0719 Added board support for holybro_durandal-v1
Durandal:Fix PLL settings

durandal-v1:Move I2C123, I2C4 to HSI.

   Not liking using HSI but, F7 has, and in reality there is no
  requerment for accuracy.

durandal-v1:board config set 400kHz on card probe

durandal-v1:Board SDMMC Clock Not greater then 25 mHz

durandal-v1:Fix PLL3 configuration typo and value

CI build config for holybro_durandal-v1

durandal-v1:Kconfig - add knob to ensure ARCH_MATH_H is kept

   Upstream changes added ARCH_HAVE_MATH_H to protect from archs
   without math.h from causing isses for users setting
   CONFIG_ARCH_MATH_H and getting errors. PX4 provides a math.h
   and we need CONFIG_ARCH_MATH_H set. So this Selects
   ARCH_HAVE_MATH_H perserving CONFIG_ARCH_MATH_H a defconfig

Track master LED removal

durandal-v1: bmi055 -> bmi088

bmi088 is what the board uses

durandal-v1:add PX4IO support

durandal-v1 rc.board_sensors: start baro

durandal-v1: remove segway module

durandal:Run at 480 Mhz

durandal-v1: build thermal control module

durandal-v1: enable IMU thermal control by default

durandal-v1:Track upstream adc start moved to rc.board_sensors

durandal-v1:Track upstream mavlink start moved to rc.board_mavlink
2019-11-16 11:43:42 +01:00
Travis Bottalico 367e756c81 Fix a missed refactor of board name in vscode file 2019-10-24 02:06:28 -04:00
modaltb 3bbf1cc868 Add support for ModalAI FC1 2019-10-19 12:23:23 -04:00
Daniel Agar 86dc4c5a00 cmake generate vscode launch.json 2019-09-21 13:06:49 -04:00
Daniel Agar b7f0db62ba
mRo Control Zero F7 initial board support 2019-08-14 13:13:27 -04:00
Daniel Agar a462bfeb53 vscode add v5x variant (for cmake configure) 2019-07-26 12:59:27 -04:00
mcsauder e6f1a2db12 Delete trailing whitespace, extra newlines, to quiet git hooks and add an extra = so that it does not appear to git as a merge conflict marker. 2019-04-02 15:31:37 -04:00
Daniel Agar 5e6bfe1ad8
vscode updates
* working debugging (one click build and debug)
   * SITL jmavsim
   * SITL gazebo
   * jlink px4_fmu-v{2-5}
 * improved syntax highlighting
   * GNU linker files
   * ROS message files msg/*.msg
   * jinja2 template files
 * fixed intellisense support
2019-03-22 20:55:39 -04:00
Daniel Agar fd8fe29ef3 vscode update targets and gdb debugging 2018-12-05 15:58:41 -05:00
Daniel Agar a5fa3eda30
vscode initial configuration (#10911) 2018-12-04 23:11:36 -05:00