Commit Graph

229 Commits

Author SHA1 Message Date
Mara Bos 10c20b38ad Fix many format strings.
Fixes these invalid format strings:
- A `%d` for a pointer (replaced it by `%p`)
- A 0x%08x (and a 0x%0x8!) for a pointer (replaced by %p)
- 2 cases of `%d` for a `ssize_t` (replaced it by `%zi`)
- 1 case of a %u for an `int` (replaced by %i)
- 3 cases of %d for a `long` (replaced by %ld)
- 19 cases of `%d`, `%i`, `%u` or `%lu` for a `size_t` (replaced it by `%zu`)
- An unused formatting argument (removed it)
- A missing `%d` (added it)
- A missing `%s` (added it)
- 2 cases of `%llu` for a `uint64_t` (replaced it by `"%" PRIu64`)
- 6 cases of giving a string directly as format string (replaced it by `("%s", string)`)
- 2 cases of %*-s, which should probably have been %-*s.
  (Looks like NuttX accepts (the invalid) %*-s, but other platforms don't.)
- A %04x for a `uint32_t` (replaced by "%04" PRIx32)
2018-10-27 12:44:51 +02:00
Daniel Agar cc64661791
Update submodule nuttx to latest Sat Oct 20 00:44:04 UTC 2018
- nuttx in PX4/Firmware (31767b6b5aeb4293c2991dbfea6b810e34a34149): 999c4357a2
    - nuttx current upstream: 166d898c70
    - Changes: 999c4357a2...166d898c70

166d898 2018-10-18 Daniel Agar - [BACKPORT] Merged in dagar/nuttx/pr-stm32_dma_per_spi (pull request #736)
0a5b1cb 2018-10-17 David Sidrane - [BACKPORT] Lampoo-master-spi-flash (pull request #735)
2018-10-19 21:22:34 -04:00
David Sidrane 640d10044c NuttX update with i2c Backport 2018-10-19 20:08:01 -04:00
Mark Sauder ad8539bd15 Deprecate the tap_common directory, nuttx, driver, and makefile references to tap-v1. (#10629) 2018-10-15 11:53:29 -04:00
TSC21 d3c1d5f019 sitl_gazebo: build with SEND_VISION_ESTIMATION_DATA set 2018-10-09 11:57:30 -04:00
Daniel Agar f74b96e918 AV-X DSM RC fixes (disable single wire) 2018-10-09 10:37:12 -04:00
mcsauder 2d208b1524 Edited aerofc-v1 file comments to not reference tap-v1. 2018-10-03 15:47:04 -04:00
Daniel Agar f2e10a163b fix qurt eagle board_identity 2018-10-03 10:30:10 +02:00
David Sidrane 61935e8271 qurt:Use PX4_SOC_ARCH_ID_t from board common 2018-10-03 10:30:10 +02:00
David Sidrane 73552bdd64 sim:Use Non Arch specific Board identity API 2018-10-03 10:30:10 +02:00
David Sidrane 2f64870e78 qurt:Use Non Arch specific Board identity API 2018-10-03 10:30:10 +02:00
David Sidrane ed9223edaf board_identity:Added common no-arch specific board_identity API
This common code can be used byt posix based boars to provide
   the board_identity API.
2018-10-03 10:30:10 +02:00
David Sidrane 347ac48eab posix:Added PX4 GUID API board_get_px4_guid_formated 2018-10-03 10:30:10 +02:00
David Sidrane 7f29b04e41 sim:Added BOARD_OVERRIDE_PX4_GUID 2018-10-03 10:30:10 +02:00
Beat Küng b972651a06 posix shell: use /bin/sh instead of bash
This uses the systems default shell:
- Ubuntu: dash
- Fedora: bash

Since bash is invoked via /bin/sh, it operates in POSIX mode:
  https://tiswww.case.edu/php/chet/bash/POSIX

- remove '# Ignore the expand_aliases command in zshell.'
  Not needed because the shell operates in POSIX mode
- [[ is bashism -> use [
- autostart_files=( $autostart_file_match )
  is not supported in dash, so use 'ls'
- shellcheck runs the dash flavor, since dash is a minimalistic shell.

Tested on dash & bash.
2018-09-27 23:39:20 +02:00
Bart Slinger ea96501e8c bebop 2: upload entire bin directory content 2018-09-26 21:34:22 +02:00
Bart Slinger adad22f879 make set function work in sh 2018-09-26 21:34:22 +02:00
Bart Slinger 4df88122cb Bebop 2: use sh instead of bash 2018-09-26 21:34:22 +02:00
PX4 Build Bot 82acf6894d Update submodule nuttx to latest Tue Sep 25 23:58:20 UTC 2018
- nuttx in PX4/Firmware (1adcfeecc20620f02439093afb85f3151b2e8be1): e31e94f5bd
    - nuttx current upstream: 7e3c8e10cd
    - Changes: e31e94f5bd...7e3c8e10cd

    7e3c8e1 2018-09-21 Gregory Nutt - [BACKPORT] 510b0f7e07 Correct all ARMv7-M architectures.
2018-09-25 20:28:47 -04:00
David Sidrane 6ec693b716 tap-v1 nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane 3f1a155e57 px4nucleoF767ZI-v1 nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane f7dd2511ab px4fmu-v5 stackcheck: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane a6e77eb9a0 px4fmu-v5 nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane a302c58a0d px4fmu-v4pro nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane 825d6c06f2 px4fmu-v4 stackcheck: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane dfc390bbe0 px4fmu-v4 nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane 2ec56cef42 px4fmu-v2 stackcheck: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane 5148d2d94f px4fmu-v2 nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane b606897743 px4flow-v2 nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane ee28b9aa69 px4esc-v1 nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane 65322c98ca px4cannode-v1 nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane 384a1dcf66 px4cannode-v1 nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane eaec63a747 px4cannode-v1 nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane 233d116aee px4-stm32f4discovery nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane 7c3850902f omnibus-f4sd nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane 053fecbf20 nxphlite-v3 nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane 0bd2a0be05 mindpx-v2 nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane 197940eadd esc35-v1 nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane 907d478f3e crazyflie nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane debb8afa0d av-x-v1 nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane fe591aee5c auav-x21 nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane e893aaec48 aerofc-v1 nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
David Sidrane 0829e3c654 aerocore2 nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP
This insures the common exception handler will not be
   re-entered. The handler does not support nested interrupts
   and the interrupt stack pointer and context will be overwritten
   resulting in hard to debug hardfaults.

   If all the priorities are equal the NVIC prevents the
   preemption. The startup code defaults all the priorities
   to the same value 128.

   This change safeguards in 2 ways 1) By disabling
   CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
   This will insure that all HW interrupts are at the same
   priority.

   2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
   exception will disable any interrupts during interrupt
   processing.
2018-09-25 12:28:03 -04:00
Daniel Agar 610ec9f854
Update submodule nuttx to latest Sun Sep 23 08:37:24 EDT 2018 (#10550)
- nuttx in PX4/Firmware (f3cbd3c744e9224bd55597fbfae23c56ce296544): 98a8951306
    - nuttx current upstream: e31e94f5bd
    - Changes: 98a8951306...e31e94f5bd

    e31e94f 2018-09-21 David Sidrane - [REJECTED] kinetis:usbdev use CONFIG_KINETIS_USBOTG_PRIO at default
2018-09-23 10:07:42 -04:00
mcsauder a1af7ffdcf Remove whitespaces to quiet git commit trailing whitespace warnings. 2018-09-21 23:28:31 +02:00
David Sidrane d2faf5f31d platforms/nuttx/NuttX/nuttx with hardfault fix 2018-09-21 22:34:38 +02:00
Matthias Grob fbd175c0c9 posix-shell server: switch pipe flag to read/write
to make it non-blocking and ommit opening the same
named pipe multiple times inside the same process
which seems to be not supported in cygwin.
2018-09-18 18:24:07 +02:00
Lukas Woodtli c1a58bda17 Add address sanitizer to SITL pipeline
- Environment variables for building with asan
- Docker argument for leak sanitizer
- Regex for tests to fail on sanitizer error

Signed-off-by: Lukas Woodtli <woodtli.lukas@gmail.com>
2018-09-16 09:40:53 +02:00
David Sidrane eb4f847322 nxphlite-v3:Set UART4 to have the same bufffer sizes as TELEM1
Bring UART4 bufffer sizes in alignment with FMUv2 Telem1
2018-09-14 15:38:56 -04:00
Roman 5847ab4607 posix main.cpp: better reporting e.g. when there are permission problems
- if somebody tries to use the shell with insufficient permissions he will be told so

Signed-off-by: Roman <bapstroman@gmail.com>
2018-09-14 14:43:08 +02:00