forked from Archive/PX4-Autopilot
px4nucleoF767ZI-v1:Fixed STM32_RCC_DCKCFGR2_DSISRC
C&P error in upstream was:RCC_DCKCFGR2_DSISEL_48MHZ is RCC_DCKCFGR2_DSISEL_PHY
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@ -163,7 +163,7 @@
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#define STM32_RCC_DCKCFGR2_CK48MSRC RCC_DCKCFGR2_CK48MSEL_PLL
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#define STM32_RCC_DCKCFGR2_SDMMCSRC RCC_DCKCFGR2_SDMMCSEL_48MHZ
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#define STM32_RCC_DCKCFGR2_SDMMC2SRC RCC_DCKCFGR2_SDMMC2SEL_48MHZ
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#define STM32_RCC_DCKCFGR2_DSISRC RCC_DCKCFGR2_DSISEL_48MHZ
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#define STM32_RCC_DCKCFGR2_DSISRC RCC_DCKCFGR2_DSISEL_PHY
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/* Several prescalers allow the configuration of the two AHB buses, the
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