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fmu-v5 timer_config: set up the timers for v5 board 

FMU_CH7/8 use timer 12 ch1/2
FMU_CAP use timer 2
Buzzer use timer 9
This commit is contained in:
Simone Guscetti 2017-05-19 11:07:31 +02:00 committed by David Sidrane
parent bc793d15cf
commit a4d8bf56cc
1 changed files with 32 additions and 0 deletions
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32
src/drivers/boards/px4fmu-v5/px4fmu_timer_config.c
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@ -71,6 +71,38 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
.last_channel_index = 5,
.handler = io_timer_handler1,
.vectorno = STM32_IRQ_TIM4,
},
{
.base = STM32_TIM12_BASE,
.clock_register = STM32_RCC_APB1ENR,
.clock_bit = RCC_APB1ENR_TIM12EN,
.clock_freq = STM32_APB1_TIM12_CLKIN,
.first_channel_index = 6,
.last_channel_index = 7,
.handler = io_timer_handler2,
.vectorno = STM32_IRQ_TIM12,
},
{
.base = STM32_TIM9_BASE,
.clock_register = STM32_RCC_APB2ENR,
.clock_bit = RCC_APB2ENR_TIM9EN,
.clock_freq = STM32_APB2_TIM9_CLKIN,
.first_channel_index = 8,
.last_channel_index = 8,
.handler = io_timer_handler3,
.vectorno = STM32_IRQ_TIM9,
},
{
.base = STM32_TIM2_BASE,
.clock_register = STM32_RCC_APB1ENR,
.clock_bit = RCC_APB2ENR_TIM2EN,
.clock_freq = STM32_APB2_TIM2_CLKIN,
.first_channel_index = 9,
.last_channel_index = 9,
.handler = io_timer_handler4,
.vectorno = STM32_IRQ_TIM2,
}
};