mirror of https://github.com/ArduPilot/ardupilot
476 lines
14 KiB
C++
476 lines
14 KiB
C++
/*
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* This file is free software: you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "SPIDevice.h"
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#include <AP_HAL/AP_HAL.h>
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#include <AP_Math/AP_Math.h>
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#include <AP_HAL/utility/OwnPtr.h>
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#include <AP_InternalError/AP_InternalError.h>
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#include "Util.h"
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#include "Scheduler.h"
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#include "Semaphores.h"
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#include <stdio.h>
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#include "hwdef/common/stm32_util.h"
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#if HAL_USE_SPI == TRUE
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using namespace ChibiOS;
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extern const AP_HAL::HAL& hal;
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// SPI mode numbers
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#if defined(STM32H7)
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#define SPIDEV_MODE0 0
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#define SPIDEV_MODE1 SPI_CFG2_CPHA
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#define SPIDEV_MODE2 SPI_CFG2_CPOL
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#define SPIDEV_MODE3 SPI_CFG2_CPOL | SPI_CFG2_CPHA
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#define SPI1_CLOCK STM32_SPI1CLK
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#define SPI2_CLOCK STM32_SPI2CLK
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#define SPI3_CLOCK STM32_SPI3CLK
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#define SPI4_CLOCK STM32_SPI4CLK
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#define SPI5_CLOCK STM32_SPI5CLK
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#define SPI6_CLOCK STM32_SPI6CLK
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#else // F4 and F7
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#define SPIDEV_MODE0 0
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#define SPIDEV_MODE1 SPI_CR1_CPHA
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#define SPIDEV_MODE2 SPI_CR1_CPOL
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#define SPIDEV_MODE3 SPI_CR1_CPOL | SPI_CR1_CPHA
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#define SPI1_CLOCK STM32_PCLK2
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#define SPI2_CLOCK STM32_PCLK1
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#define SPI3_CLOCK STM32_PCLK1
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#define SPI4_CLOCK STM32_PCLK2
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#define SPI5_CLOCK STM32_PCLK2
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#define SPI6_CLOCK STM32_PCLK2
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#endif
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// expected bus clock speeds
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static const uint32_t bus_clocks[6] = {
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SPI1_CLOCK, SPI2_CLOCK, SPI3_CLOCK, SPI4_CLOCK, SPI5_CLOCK, SPI6_CLOCK
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};
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static const struct SPIDriverInfo {
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SPIDriver *driver;
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uint8_t busid; // used for device IDs in parameters
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uint8_t dma_channel_rx;
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uint8_t dma_channel_tx;
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} spi_devices[] = { HAL_SPI_BUS_LIST };
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#define MHZ (1000U*1000U)
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#define KHZ (1000U)
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// device list comes from hwdef.dat
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ChibiOS::SPIDesc SPIDeviceManager::device_table[] = { HAL_SPI_DEVICE_LIST };
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SPIBus::SPIBus(uint8_t _bus) :
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DeviceBus(APM_SPI_PRIORITY),
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bus(_bus)
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{
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chMtxObjectInit(&dma_lock);
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// allow for sharing of DMA channels with other peripherals
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dma_handle = new Shared_DMA(spi_devices[bus].dma_channel_rx,
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spi_devices[bus].dma_channel_tx,
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FUNCTOR_BIND_MEMBER(&SPIBus::dma_allocate, void, Shared_DMA *),
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FUNCTOR_BIND_MEMBER(&SPIBus::dma_deallocate, void, Shared_DMA *));
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}
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/*
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allocate DMA channel
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*/
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void SPIBus::dma_allocate(Shared_DMA *ctx)
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{
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// nothing to do as we call spiStart() on each transaction
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}
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/*
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deallocate DMA channel
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*/
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void SPIBus::dma_deallocate(Shared_DMA *ctx)
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{
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chMtxLock(&dma_lock);
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// another non-SPI peripheral wants one of our DMA channels
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if (spi_started) {
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spiStop(spi_devices[bus].driver);
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spi_started = false;
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}
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chMtxUnlock(&dma_lock);
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}
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SPIDevice::SPIDevice(SPIBus &_bus, SPIDesc &_device_desc)
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: bus(_bus)
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, device_desc(_device_desc)
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{
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set_device_bus(spi_devices[_bus.bus].busid);
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set_device_address(_device_desc.device);
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freq_flag_low = derive_freq_flag(device_desc.lowspeed);
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freq_flag_high = derive_freq_flag(device_desc.highspeed);
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set_speed(AP_HAL::Device::SPEED_LOW);
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asprintf(&pname, "SPI:%s:%u:%u",
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device_desc.name,
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(unsigned)bus.bus, (unsigned)device_desc.device);
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//printf("SPI device %s on %u:%u at speed %u mode %u\n",
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// device_desc.name,
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// (unsigned)bus.bus, (unsigned)device_desc.device,
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// (unsigned)frequency, (unsigned)device_desc.mode);
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}
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SPIDevice::~SPIDevice()
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{
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//printf("SPI device %s on %u:%u closed\n", device_desc.name,
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// (unsigned)bus.bus, (unsigned)device_desc.device);
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free(pname);
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}
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SPIDriver * SPIDevice::get_driver() {
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return spi_devices[device_desc.bus].driver;
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}
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bool SPIDevice::set_speed(AP_HAL::Device::Speed speed)
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{
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switch (speed) {
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case AP_HAL::Device::SPEED_HIGH:
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freq_flag = freq_flag_high;
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break;
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case AP_HAL::Device::SPEED_LOW:
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freq_flag = freq_flag_low;
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break;
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}
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return true;
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}
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/*
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setup a bus slowdown factor for high speed mode
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*/
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void SPIDevice::set_slowdown(uint8_t slowdown)
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{
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slowdown = constrain_int16(slowdown+1, 1, 32);
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freq_flag_high = derive_freq_flag(device_desc.highspeed / slowdown);
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}
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/*
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low level transfer function
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*/
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bool SPIDevice::do_transfer(const uint8_t *send, uint8_t *recv, uint32_t len)
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{
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bool old_cs_forced = cs_forced;
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if (!set_chip_select(true)) {
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return false;
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}
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bool ret = true;
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#if defined(HAL_SPI_USE_POLLED)
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for (uint16_t i=0; i<len; i++) {
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uint8_t ret = spiPolledExchange(spi_devices[device_desc.bus].driver, send?send[i]:0);
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if (recv) {
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recv[i] = ret;
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}
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}
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#else
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bus.bouncebuffer_setup(send, len, recv, len);
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osalSysLock();
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hal.util->persistent_data.spi_count++;
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if (send == nullptr) {
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spiStartReceiveI(spi_devices[device_desc.bus].driver, len, recv);
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} else if (recv == nullptr) {
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spiStartSendI(spi_devices[device_desc.bus].driver, len, send);
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} else {
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spiStartExchangeI(spi_devices[device_desc.bus].driver, len, send, recv);
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}
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// we allow SPI transfers to take a maximum of 20ms plus 32us per
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// byte. This covers all use cases in ArduPilot. We don't ever
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// expect this timeout to trigger unless there is a severe MCU
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// error
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const uint32_t timeout_us = 20000U + len * 32U;
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msg_t msg = osalThreadSuspendTimeoutS(&spi_devices[device_desc.bus].driver->thread, TIME_MS2I(timeout_us));
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osalSysUnlock();
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if (msg == MSG_TIMEOUT) {
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ret = false;
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AP::internalerror().error(AP_InternalError::error_t::spi_fail);
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spiAbort(spi_devices[device_desc.bus].driver);
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}
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bus.bouncebuffer_finish(send, recv, len);
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#endif
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set_chip_select(old_cs_forced);
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return ret;
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}
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bool SPIDevice::clock_pulse(uint32_t n)
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{
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if (!cs_forced) {
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//special mode to init sdcard without cs asserted
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bus.semaphore.take(HAL_SEMAPHORE_BLOCK_FOREVER);
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acquire_bus(true, true);
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spiIgnore(spi_devices[device_desc.bus].driver, n);
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acquire_bus(false, true);
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bus.semaphore.give();
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} else {
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bus.semaphore.assert_owner();
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spiIgnore(spi_devices[device_desc.bus].driver, n);
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}
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return true;
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}
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uint32_t SPIDevice::derive_freq_flag_bus(uint8_t busid, uint32_t _frequency)
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{
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uint32_t spi_clock_freq = SPI1_CLOCK;
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if (busid > 0 && uint8_t(busid-1) < ARRAY_SIZE(bus_clocks)) {
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spi_clock_freq = bus_clocks[busid-1] / 2;
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}
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// find first divisor that brings us below the desired SPI clock
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uint32_t i = 0;
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while (spi_clock_freq > _frequency && i<7) {
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spi_clock_freq >>= 1;
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i++;
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}
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// assuming the bitrate bits are consecutive in the CR1 register,
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// we can just multiply by BR_0 to get the right bits for the desired
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// scaling
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#if defined(STM32H7)
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return (i * SPI_CFG1_MBR_0) | SPI_CFG1_DSIZE_VALUE(7); // 8 bit transfers
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#else
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return i * SPI_CR1_BR_0;
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#endif
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}
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uint32_t SPIDevice::derive_freq_flag(uint32_t _frequency)
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{
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uint8_t busid = spi_devices[device_desc.bus].busid;
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return derive_freq_flag_bus(busid, _frequency);
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}
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bool SPIDevice::transfer(const uint8_t *send, uint32_t send_len,
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uint8_t *recv, uint32_t recv_len)
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{
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if (!bus.semaphore.check_owner()) {
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hal.console->printf("SPI: not owner of 0x%x\n", unsigned(get_bus_id()));
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return false;
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}
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if ((send_len == recv_len && send == recv) || !send || !recv) {
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// simplest cases, needed for DMA
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return do_transfer(send, recv, recv_len?recv_len:send_len);
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}
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uint8_t buf[send_len+recv_len];
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if (send_len > 0) {
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memcpy(buf, send, send_len);
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}
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if (recv_len > 0) {
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memset(&buf[send_len], 0, recv_len);
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}
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bool ret = do_transfer(buf, buf, send_len+recv_len);
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if (ret && recv_len > 0) {
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memcpy(recv, &buf[send_len], recv_len);
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}
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return ret;
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}
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bool SPIDevice::transfer_fullduplex(const uint8_t *send, uint8_t *recv, uint32_t len)
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{
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bus.semaphore.assert_owner();
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uint8_t buf[len];
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memcpy(buf, send, len);
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bool ret = do_transfer(buf, buf, len);
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if (ret) {
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memcpy(recv, buf, len);
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}
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return ret;
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}
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AP_HAL::Semaphore *SPIDevice::get_semaphore()
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{
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return &bus.semaphore;
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}
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AP_HAL::Device::PeriodicHandle SPIDevice::register_periodic_callback(uint32_t period_usec, AP_HAL::Device::PeriodicCb cb)
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{
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return bus.register_periodic_callback(period_usec, cb, this);
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}
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bool SPIDevice::adjust_periodic_callback(AP_HAL::Device::PeriodicHandle h, uint32_t period_usec)
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{
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return bus.adjust_timer(h, period_usec);
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}
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/*
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used to acquire bus and (optionally) assert cs
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*/
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bool SPIDevice::acquire_bus(bool set, bool skip_cs)
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{
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bus.semaphore.assert_owner();
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if (set && cs_forced) {
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return true;
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}
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if (!set && !cs_forced) {
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return false;
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}
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if (!set && cs_forced) {
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if(!skip_cs) {
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spiUnselectI(spi_devices[device_desc.bus].driver); /* Slave Select de-assertion. */
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}
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spiReleaseBus(spi_devices[device_desc.bus].driver); /* Ownership release. */
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cs_forced = false;
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bus.dma_handle->unlock();
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} else {
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bus.dma_handle->lock();
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spiAcquireBus(spi_devices[device_desc.bus].driver); /* Acquire ownership of the bus. */
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bus.spicfg.end_cb = nullptr;
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bus.spicfg.ssport = PAL_PORT(device_desc.pal_line);
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bus.spicfg.sspad = PAL_PAD(device_desc.pal_line);
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#if defined(STM32H7)
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bus.spicfg.cfg1 = freq_flag;
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bus.spicfg.cfg2 = device_desc.mode;
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if (bus.spicfg.dummytx == nullptr) {
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bus.spicfg.dummytx = (uint32_t *)malloc_dma(4);
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memset(bus.spicfg.dummytx, 0xFF, 4);
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}
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if (bus.spicfg.dummyrx == nullptr) {
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bus.spicfg.dummyrx = (uint32_t *)malloc_dma(4);
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}
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#else
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bus.spicfg.cr1 = (uint16_t)(freq_flag | device_desc.mode);
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bus.spicfg.cr2 = 0;
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#endif
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if (bus.spi_started) {
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spiStop(spi_devices[device_desc.bus].driver);
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bus.spi_started = false;
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}
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spiStart(spi_devices[device_desc.bus].driver, &bus.spicfg); /* Setup transfer parameters. */
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bus.spi_started = true;
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if(!skip_cs) {
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spiSelectI(spi_devices[device_desc.bus].driver); /* Slave Select assertion. */
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}
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cs_forced = true;
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}
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return true;
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}
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/*
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allow for control of SPI chip select pin
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*/
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bool SPIDevice::set_chip_select(bool set) {
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return acquire_bus(set, false);
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}
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/*
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return a SPIDevice given a string device name
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*/
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AP_HAL::OwnPtr<AP_HAL::SPIDevice>
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SPIDeviceManager::get_device(const char *name)
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{
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/* Find the bus description in the table */
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uint8_t i;
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for (i = 0; i<ARRAY_SIZE(device_table); i++) {
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if (strcmp(device_table[i].name, name) == 0) {
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break;
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}
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}
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if (i == ARRAY_SIZE(device_table)) {
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return AP_HAL::OwnPtr<AP_HAL::SPIDevice>(nullptr);
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}
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SPIDesc &desc = device_table[i];
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// find the bus
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SPIBus *busp;
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for (busp = buses; busp; busp = (SPIBus *)busp->next) {
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if (busp->bus == desc.bus) {
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break;
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}
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}
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if (busp == nullptr) {
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// create a new one
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busp = new SPIBus(desc.bus);
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if (busp == nullptr) {
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return nullptr;
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}
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busp->next = buses;
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busp->bus = desc.bus;
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buses = busp;
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}
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return AP_HAL::OwnPtr<AP_HAL::SPIDevice>(new SPIDevice(*busp, desc));
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}
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#ifdef HAL_SPI_CHECK_CLOCK_FREQ
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/*
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test clock frequencies. This measures the actual SPI clock
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frequencies on all configured SPI buses. Used during board bringup
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to validate clock configuration
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*/
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void SPIDevice::test_clock_freq(void)
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{
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// delay for USB to come up
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hal.console->printf("Waiting for USB\n");
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for (uint8_t i=0; i<3; i++) {
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hal.scheduler->delay(1000);
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hal.console->printf("Waiting %u\n", AP_HAL::millis());
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}
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hal.console->printf("CLOCKS=\n");
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for (uint8_t i=0; i<ARRAY_SIZE(bus_clocks); i++) {
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hal.console->printf("%u:%u ", i+1, bus_clocks[i]);
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}
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hal.console->printf("\n");
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// we will send 1024 bytes without any CS asserted and measure the
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// time it takes to do the transfer
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uint16_t len = 1024;
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uint8_t *buf1 = (uint8_t *)hal.util->malloc_type(len, AP_HAL::Util::MEM_DMA_SAFE);
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uint8_t *buf2 = (uint8_t *)hal.util->malloc_type(len, AP_HAL::Util::MEM_DMA_SAFE);
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for (uint8_t i=0; i<ARRAY_SIZE(spi_devices); i++) {
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SPIConfig spicfg {};
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const uint32_t target_freq = 2000000UL;
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// use a clock divisor of 256 for maximum resolution
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#if defined(STM32H7)
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spicfg.cfg1 = derive_freq_flag_bus(spi_devices[i].busid, target_freq);
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#else
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spicfg.cr1 = derive_freq_flag_bus(spi_devices[i].busid, target_freq);
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#endif
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spiAcquireBus(spi_devices[i].driver);
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spiStart(spi_devices[i].driver, &spicfg);
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uint32_t t0 = AP_HAL::micros();
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spiStartExchange(spi_devices[i].driver, len, buf1, buf2);
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chSysLock();
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msg_t msg = osalThreadSuspendTimeoutS(&spi_devices[i].driver->thread, TIME_MS2I(100));
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chSysUnlock();
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if (msg == MSG_TIMEOUT) {
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spiAbort(spi_devices[i].driver);
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hal.console->printf("SPI[%u] FAIL %p %p\n", spi_devices[i].busid, buf1, buf2);
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spiStop(spi_devices[i].driver);
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spiReleaseBus(spi_devices[i].driver);
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continue;
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}
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uint32_t t1 = AP_HAL::micros();
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spiStop(spi_devices[i].driver);
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spiReleaseBus(spi_devices[i].driver);
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hal.console->printf("SPI[%u] clock=%u\n", spi_devices[i].busid, unsigned(1000000ULL * len * 8ULL / uint64_t(t1 - t0)));
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}
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hal.util->free_type(buf1, len, AP_HAL::Util::MEM_DMA_SAFE);
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hal.util->free_type(buf2, len, AP_HAL::Util::MEM_DMA_SAFE);
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}
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#endif // HAL_SPI_CHECK_CLOCK_FREQ
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#endif // HAL_USE_SPI
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