mirror of https://github.com/ArduPilot/ardupilot
247 lines
7.8 KiB
C++
247 lines
7.8 KiB
C++
#include <AP_HAL/AP_HAL.h>
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#if CONFIG_HAL_BOARD_SUBTYPE == HAL_BOARD_SUBTYPE_LINUX_ERLEBRAIN2 || \
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CONFIG_HAL_BOARD_SUBTYPE == HAL_BOARD_SUBTYPE_LINUX_BH || \
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CONFIG_HAL_BOARD_SUBTYPE == HAL_BOARD_SUBTYPE_LINUX_DARK || \
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CONFIG_HAL_BOARD_SUBTYPE == HAL_BOARD_SUBTYPE_LINUX_PXFMINI || \
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CONFIG_HAL_BOARD_SUBTYPE == HAL_BOARD_SUBTYPE_LINUX_NAVIGATOR || \
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CONFIG_HAL_BOARD_SUBTYPE == HAL_BOARD_SUBTYPE_LINUX_OBAL_V1
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#include <assert.h>
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#include <errno.h>
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#include <fcntl.h>
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#include <poll.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <sys/mman.h>
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#include <sys/stat.h>
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#include <unistd.h>
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#include "GPIO.h"
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#include "Util_RPI.h"
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#define GPIO_RPI_MAX_NUMBER_PINS 32
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using namespace Linux;
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extern const AP_HAL::HAL& hal;
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// Range based in the first memory address of the first register and the last memory addres
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// for the GPIO section (0x7E20'00B4 - 0x7E20'0000).
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const uint8_t GPIO_RPI::_gpio_registers_memory_range = 0xB4;
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const char* GPIO_RPI::_system_memory_device_path = "/dev/mem";
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GPIO_RPI::GPIO_RPI()
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{
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}
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void GPIO_RPI::set_gpio_mode_alt(int pin, int alternative)
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{
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// Each register can contain 10 pins
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const uint8_t pins_per_register = 10;
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// Calculates the position of the 3 bit mask in the 32 bits register
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const uint8_t tree_bits_position_in_register = (pin%pins_per_register)*3;
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/** Creates a mask to enable the alternative function based in the following logic:
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*
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* | Alternative Function | 3 bits value |
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* |:--------------------:|:------------:|
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* | Function 0 | 0b100 |
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* | Function 1 | 0b101 |
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* | Function 2 | 0b110 |
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* | Function 3 | 0b111 |
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* | Function 4 | 0b011 |
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* | Function 5 | 0b010 |
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*/
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const uint8_t alternative_value =
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(alternative < 4 ? (alternative + 4) : (alternative == 4 ? 3 : 2));
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// 0b00'000'000'000'000'000'000'ALT'000'000'000 enables alternative for the 4th pin
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const uint32_t mask_with_alt = static_cast<uint32_t>(alternative_value) << tree_bits_position_in_register;
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const uint32_t mask = 0b111 << tree_bits_position_in_register;
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// Clear all bits in our position and apply our mask with alt values
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uint32_t register_value = _gpio[pin / pins_per_register];
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register_value &= ~mask;
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_gpio[pin / pins_per_register] = register_value | mask_with_alt;
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}
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void GPIO_RPI::set_gpio_mode_in(int pin)
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{
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// Each register can contain 10 pins
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const uint8_t pins_per_register = 10;
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// Calculates the position of the 3 bit mask in the 32 bits register
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const uint8_t tree_bits_position_in_register = (pin%pins_per_register)*3;
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// Create a mask that only removes the bits in this specific GPIO pin, E.g:
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// 0b11'111'111'111'111'111'111'000'111'111'111 for the 4th pin
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const uint32_t mask = ~(0b111<<tree_bits_position_in_register);
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// Apply mask
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_gpio[pin / pins_per_register] &= mask;
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}
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void GPIO_RPI::set_gpio_mode_out(int pin)
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{
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// Each register can contain 10 pins
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const uint8_t pins_per_register = 10;
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// Calculates the position of the 3 bit mask in the 32 bits register
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const uint8_t tree_bits_position_in_register = (pin%pins_per_register)*3;
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// Create a mask to enable the bit that sets output functionality
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// 0b00'000'000'000'000'000'000'001'000'000'000 enables output for the 4th pin
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const uint32_t mask_with_bit = 0b001 << tree_bits_position_in_register;
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const uint32_t mask = 0b111 << tree_bits_position_in_register;
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// Clear all bits in our position and apply our mask with alt values
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uint32_t register_value = _gpio[pin / pins_per_register];
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register_value &= ~mask;
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_gpio[pin / pins_per_register] = register_value | mask_with_bit;
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}
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void GPIO_RPI::set_gpio_high(int pin)
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{
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// Calculate index of the array for the register GPSET0 (0x7E20'001C)
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constexpr uint32_t gpset0_memory_offset_value = 0x1c;
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constexpr uint32_t gpset0_index_value = gpset0_memory_offset_value / sizeof(*_gpio);
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_gpio[gpset0_index_value] = 1 << pin;
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}
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void GPIO_RPI::set_gpio_low(int pin)
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{
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// Calculate index of the array for the register GPCLR0 (0x7E20'0028)
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constexpr uint32_t gpclr0_memory_offset_value = 0x28;
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constexpr uint32_t gpclr0_index_value = gpclr0_memory_offset_value / sizeof(*_gpio);
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_gpio[gpclr0_index_value] = 1 << pin;
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}
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bool GPIO_RPI::get_gpio_logic_state(int pin)
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{
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// Calculate index of the array for the register GPLEV0 (0x7E20'0034)
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constexpr uint32_t gplev0_memory_offset_value = 0x34;
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constexpr uint32_t gplev0_index_value = gplev0_memory_offset_value / sizeof(*_gpio);
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return _gpio[gplev0_index_value] & (1 << pin);
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}
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uint32_t GPIO_RPI::get_address(GPIO_RPI::Address address, GPIO_RPI::PeripheralOffset offset) const
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{
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return static_cast<uint32_t>(address) + static_cast<uint32_t>(offset);
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}
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volatile uint32_t* GPIO_RPI::get_memory_pointer(uint32_t address, uint32_t range) const
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{
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auto pointer = mmap(
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nullptr, // Any adddress in our space will do
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range, // Map length
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PROT_READ|PROT_WRITE|PROT_EXEC, // Enable reading & writing to mapped memory
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MAP_SHARED|MAP_LOCKED, // Shared with other processes
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_system_memory_device, // File to map
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address // Offset to GPIO peripheral
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);
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if (pointer == MAP_FAILED) {
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return nullptr;
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}
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return static_cast<volatile uint32_t*>(pointer);
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}
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bool GPIO_RPI::openMemoryDevice()
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{
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_system_memory_device = open(_system_memory_device_path, O_RDWR|O_SYNC|O_CLOEXEC);
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if (_system_memory_device < 0) {
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AP_HAL::panic("Can't open %s", GPIO_RPI::_system_memory_device_path);
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return false;
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}
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return true;
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}
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void GPIO_RPI::closeMemoryDevice()
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{
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close(_system_memory_device);
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// Invalidate device variable
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_system_memory_device = -1;
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}
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void GPIO_RPI::init()
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{
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const int rpi_version = UtilRPI::from(hal.util)->get_rpi_version();
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GPIO_RPI::Address peripheral_base;
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if(rpi_version == 1) {
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peripheral_base = Address::BCM2708_PERIPHERAL_BASE;
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} else if (rpi_version == 2) {
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peripheral_base = Address::BCM2709_PERIPHERAL_BASE;
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} else {
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peripheral_base = Address::BCM2711_PERIPHERAL_BASE;
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}
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if (!openMemoryDevice()) {
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AP_HAL::panic("Failed to initialize memory device.");
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return;
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}
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const uint32_t gpio_address = get_address(peripheral_base, PeripheralOffset::GPIO);
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_gpio = get_memory_pointer(gpio_address, _gpio_registers_memory_range);
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if (!_gpio) {
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AP_HAL::panic("Failed to get GPIO memory map.");
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}
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// No need to keep mem_fd open after mmap
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closeMemoryDevice();
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}
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void GPIO_RPI::pinMode(uint8_t pin, uint8_t output)
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{
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if (output == HAL_GPIO_INPUT) {
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set_gpio_mode_in(pin);
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} else {
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set_gpio_mode_in(pin);
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set_gpio_mode_out(pin);
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}
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}
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void GPIO_RPI::pinMode(uint8_t pin, uint8_t output, uint8_t alt)
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{
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if (output == HAL_GPIO_INPUT) {
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set_gpio_mode_in(pin);
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} else if (output == HAL_GPIO_ALT) {
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set_gpio_mode_in(pin);
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set_gpio_mode_alt(pin, alt);
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} else {
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set_gpio_mode_in(pin);
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set_gpio_mode_out(pin);
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}
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}
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uint8_t GPIO_RPI::read(uint8_t pin)
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{
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if (pin >= GPIO_RPI_MAX_NUMBER_PINS) {
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return 0;
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}
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return static_cast<uint8_t>(get_gpio_logic_state(pin));
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}
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void GPIO_RPI::write(uint8_t pin, uint8_t value)
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{
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if (value != 0) {
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set_gpio_high(pin);
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} else {
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set_gpio_low(pin);
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}
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}
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void GPIO_RPI::toggle(uint8_t pin)
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{
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write(pin, !read(pin));
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}
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/* Alternative interface: */
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AP_HAL::DigitalSource* GPIO_RPI::channel(uint16_t n)
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{
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return new DigitalSource(n);
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}
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bool GPIO_RPI::usb_connected(void)
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{
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return false;
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}
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#endif
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