this replaces the two booleans used to mediate TX and RX buffer
protection with mutexes.
The booleans were a hangover from the very early HAL_ChibiOS code, and
can lead to a deadlock. The sequence is as follows:
- a very high CAN bus bandwidth usage, triggered by MissionPlanner
requesting CAN_FORWARD on a CAN serial port. That causes a
"infinite" number of CAN_FRAME messages which saturates the bus,
and leads to the DroneCAN thread looping with no pause
- a serial port configured as GPS type AUTO, auto-probing for a GPS
that isn't there. This calls begin() periodically
- the UART TX thread assocated with that UART not making progress as
the TX thread priority is below the DroneCAN thread priority
- this causes the begin() in main thread waiting for _in_tx_timer to
loop forever, which triggers a watchdog
Add code to reflect USB ACM parity setting to the passthrough port alongside existing support for ACM baud rate changes. Some use cases for serial passthrough require specific parity settings.
For example, even parity is used and required by the USART protocol used in the STM32 system bootloader. This enhancement allows the use of standard flash programming tools such as STM32CubeProgrammer to flash connected STM based peripherals such as Receivers and Telemetry radios via serial passthrough. Some examples of such peripherals include the FrSky R9 receivers as well as various other STM based LoRa modules used by the mLRS project.
SERIAL_ORDER has been around for a few years now and UART_ORDER is
rejected by the hwdef script, so support for UART_ORDER and associated
processing in the hwdef script is removed, along with the order
conversion script.
refactor rcout into separate thread and process all dshot requests there
move uart DMA completion to event model
process dshot locks in strick reverse order when unlocking
convert Shared_DMA to use mutexes
move UART transmit to a thread-per-uart
do blocking UART DMA transactions
do blocking dshot DMA transactions
trim stack sizes
cancel dma transactions on dshot when timeout occurs
support contention stats on blocking locking
move thread supression into chibios_hwdef.py
invalidate DMA bounce buffer correctly
separate UART initialisation into two halves
cleanup UART transaction timeouts
add @SYS/uarts.txt
move half-duplex handling to TX thread
correct thread statistics after use of ExpandingString
set unbuffered TX thread priority owner + 1
correctly unlock serial_led_send()
don't share IMU RX on KakuteF7Mini
observe dshot pulse time more accurately.
set TRBUFF bit for UART DMA transfers
deal with UART DMA timeouts correctly
don't deadlock on reverse ordered DMA locks
change PORT_INT_REQUIRED_STACK to 128
When hw flow control is enabled check the CTS pin before we grab the
DMA channel to prevent a long timeout trying to send to a blocked port
from holding a DMA channel against another device
this fixes issue #16587
when a peripheral is made available via BRD_ALT_CONFIG we need to
remap the existing ioline_t in the UART and I2C drivers to use the new
pin.
This fixes an issue with half-duplex, inverted, swapped UART pins for
protocols like FPort and FPort2
this fixes an issue seen on one board which caused a watchdog on high
uart DMA load. We have reproduced the issue on another board by
forcing a very high DMA transfer rate on the same DMA channel while
also requesting very high transfer rates on the UART. The likely race
is in the DMA transmit timeout code, and the simplest fix is to lock
out interrupts during the DMA setup to ensure the tx timeout cannot
trigger during the setup
this caused a failure to boot on some boards if they tried to print
messages in early startup code before hal was initialised
thanks to @Shadowru for reporting the issue
Andrew Tridgell
bugobliterator
Brad Bosch
Iampete1
Thomas Watson
Peter Barker
olliw42
Andy Piper
jackhong12
Stephen Dade
Mirko Denecke