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AP_HAL_ChibiOS: reduce default BRD_PWM_COUNT to 4 for fmv3

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also default relay pins to use aux out 5 and 6
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Randy Mackay 2018-07-09 19:07:28 +09:00 committed by Andrew Tridgell
parent a7d9f4eef7
commit af6c5ebda1
1 changed files with 6 additions and 0 deletions
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6
libraries/AP_HAL_ChibiOS/hwdef/fmuv3/hwdef.dat
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@ -343,6 +343,12 @@ PE9 TIM1_CH1 TIM1 PWM(4) GPIO(53)
PD13 TIM4_CH2 TIM4 PWM(5) GPIO(54) PD13 TIM4_CH2 TIM4 PWM(5) GPIO(54)
PD14 TIM4_CH3 TIM4 PWM(6) GPIO(55) PD14 TIM4_CH3 TIM4 PWM(6) GPIO(55)
define BOARD_PWM_COUNT_DEFAULT 4
# relays default to use GPIO pins 54 and 55
define RELAY1_PIN_DEFAULT 54
define RELAY2_PIN_DEFAULT 55
# this is the invensense data-ready pin. We don't use it in the # this is the invensense data-ready pin. We don't use it in the
# default driver # default driver
PD15 MPU_DRDY INPUT PD15 MPU_DRDY INPUT