From af6c5ebda1f6e99b3199adddecce080cdb44007b Mon Sep 17 00:00:00 2001 From: Randy Mackay Date: Mon, 9 Jul 2018 19:07:28 +0900 Subject: [PATCH] AP_HAL_ChibiOS: reduce default BRD_PWM_COUNT to 4 for fmv3 also default relay pins to use aux out 5 and 6 --- libraries/AP_HAL_ChibiOS/hwdef/fmuv3/hwdef.dat | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/libraries/AP_HAL_ChibiOS/hwdef/fmuv3/hwdef.dat b/libraries/AP_HAL_ChibiOS/hwdef/fmuv3/hwdef.dat index 9bc3bec59f..9cc5648d81 100644 --- a/libraries/AP_HAL_ChibiOS/hwdef/fmuv3/hwdef.dat +++ b/libraries/AP_HAL_ChibiOS/hwdef/fmuv3/hwdef.dat @@ -343,6 +343,12 @@ PE9 TIM1_CH1 TIM1 PWM(4) GPIO(53) PD13 TIM4_CH2 TIM4 PWM(5) GPIO(54) PD14 TIM4_CH3 TIM4 PWM(6) GPIO(55) +define BOARD_PWM_COUNT_DEFAULT 4 + +# relays default to use GPIO pins 54 and 55 +define RELAY1_PIN_DEFAULT 54 +define RELAY2_PIN_DEFAULT 55 + # this is the invensense data-ready pin. We don't use it in the # default driver PD15 MPU_DRDY INPUT