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HAL_ChibiOS: started on fmuv5
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libraries/AP_HAL_ChibiOS/hwdef/fmuv5/hwdef.dat
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52
libraries/AP_HAL_ChibiOS/hwdef/fmuv5/hwdef.dat
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# hw definition file for processing by chibios_hwdef.py
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# for FMUv3 hardware (ie. for CUAV-PixHack-v5 and Pixhawk4)
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# MCU class and specific type
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MCU STM32F7xx STM32F767xx
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# crystal frequency
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OSCILLATOR_HZ 16000000
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define STM32_LSECLK 32768U
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define STM32_LSEDRV (3U << 3U)
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define STM32_PLLSRC STM32_PLLSRC_HSE
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define STM32_PLLM_VALUE 8
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define STM32_PLLN_VALUE 216
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define STM32_PLLP_VALUE 2
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define STM32_PLLQ_VALUE 9
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define CONFIG_HAL_BOARD_SUBTYPE HAL_BOARD_SUBTYPE_CHIBIOS_FMUV5
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# board ID for firmware load
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APJ_BOARD_ID 50
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FLASH_RESERVE_START_KB 32
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# board voltage
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STM32_VDD 330U
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# flash size
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FLASH_SIZE_KB 2048
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# order of UARTs (and USB)
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UART_ORDER OTG1
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# now we define the pins that USB is connected on
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PA11 OTG_FS_DM OTG1
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PA12 OTG_FS_DP OTG1
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# these are the pins for SWD debugging with a STlinkv2 or black-magic probe
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PA13 JTMS-SWDIO SWD
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PA14 JTCK-SWCLK SWD
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define HAL_USE_EMPTY_STORAGE 1
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define HAL_STORAGE_SIZE 16384
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define HAL_COMPASS_DEFAULT HAL_COMPASS_NONE
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define HAL_INS_DEFAULT HAL_INS_NONE
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define HAL_BARO_DEFAULT HAL_BARO_NONE
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define CH_DBG_ENABLE_ASSERTS TRUE
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define CH_DBG_ENABLE_CHECKS TRUE
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define CH_DBG_SYSTEM_STATE_CHECK TRUE
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define CH_DBG_ENABLE_STACK_CHECK TRUE
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