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HAL_ChibiOS: allow adjustment of F7 I2C timing
needed for F732
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@ -53,11 +53,19 @@ I2CBus I2CDeviceManager::businfo[ARRAY_SIZE(I2CD)];
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#endif
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#endif
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// values calculated with STM32CubeMX tool, PCLK=54MHz
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// values calculated with STM32CubeMX tool, PCLK=54MHz
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#define HAL_I2C_F7_100_TIMINGR 0x20404768
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#ifndef HAL_I2C_F7_100_TIMINGR
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#define HAL_I2C_F7_100_TIMINGR 0x30812E3E
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#endif
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#ifndef HAL_I2C_F7_400_TIMINGR
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#define HAL_I2C_F7_400_TIMINGR 0x6000030D
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#define HAL_I2C_F7_400_TIMINGR 0x6000030D
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#endif
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#ifndef HAL_I2C_H7_100_TIMINGR
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#define HAL_I2C_H7_100_TIMINGR 0x00707CBB
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#define HAL_I2C_H7_100_TIMINGR 0x00707CBB
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#endif
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#ifndef HAL_I2C_H7_400_TIMINGR
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#define HAL_I2C_H7_400_TIMINGR 0x00300F38
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#define HAL_I2C_H7_400_TIMINGR 0x00300F38
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#endif
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/*
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/*
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enable clear (toggling SCL) on I2C bus timeouts which leave SDA stuck low
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enable clear (toggling SCL) on I2C bus timeouts which leave SDA stuck low
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