From 4d661911e50b9b66bd1928cd2192ba90828172ca Mon Sep 17 00:00:00 2001
From: Andrew Tridgell <andrew@tridgell.net>
Date: Fri, 7 May 2021 10:56:53 +1000
Subject: [PATCH] HAL_ChibiOS: allow adjustment of F7 I2C timing

needed for F732
---
 libraries/AP_HAL_ChibiOS/I2CDevice.cpp | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/libraries/AP_HAL_ChibiOS/I2CDevice.cpp b/libraries/AP_HAL_ChibiOS/I2CDevice.cpp
index 5f18717635..247b6723ed 100644
--- a/libraries/AP_HAL_ChibiOS/I2CDevice.cpp
+++ b/libraries/AP_HAL_ChibiOS/I2CDevice.cpp
@@ -53,11 +53,19 @@ I2CBus I2CDeviceManager::businfo[ARRAY_SIZE(I2CD)];
 #endif
 
 // values calculated with STM32CubeMX tool, PCLK=54MHz
-#define HAL_I2C_F7_100_TIMINGR 0x20404768
+#ifndef HAL_I2C_F7_100_TIMINGR
+#define HAL_I2C_F7_100_TIMINGR 0x30812E3E
+#endif
+#ifndef HAL_I2C_F7_400_TIMINGR
 #define HAL_I2C_F7_400_TIMINGR 0x6000030D
+#endif
 
+#ifndef HAL_I2C_H7_100_TIMINGR
 #define HAL_I2C_H7_100_TIMINGR 0x00707CBB
+#endif
+#ifndef HAL_I2C_H7_400_TIMINGR
 #define HAL_I2C_H7_400_TIMINGR 0x00300F38
+#endif
 
 /*
   enable clear (toggling SCL) on I2C bus timeouts which leave SDA stuck low