mirror of https://github.com/ArduPilot/ardupilot
385 lines
12 KiB
C
385 lines
12 KiB
C
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/*
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ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/*
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* This file is free software: you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* Modified for use in AP_HAL by Andrew Tridgell and Siddharth Bharat Purohit
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*/
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/*
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this provides the default mcuconf.h for each board. Override values in hwdef.dat
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*/
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#pragma once
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/*
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* STM32F4xx drivers configuration.
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* The following settings override the default settings present in
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* the various device driver implementation headers.
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* Note that the settings for each driver only have effect if the whole
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* driver is enabled in halconf.h.
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*
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* IRQ priorities:
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* 15...0 Lowest...Highest.
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*
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* DMA priorities:
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* 0...3 Lowest...Highest.
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*/
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/*
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* HAL driver system settings.
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*/
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#define STM32_NO_INIT FALSE
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#ifndef STM32_HSI_ENABLED
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#define STM32_HSI_ENABLED TRUE
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#endif
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#ifndef STM32_LSI_ENABLED
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#define STM32_LSI_ENABLED TRUE
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#endif
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#ifndef STM32_HSE_ENABLED
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#define STM32_HSE_ENABLED TRUE
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#endif
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#ifndef STM32_LSE_ENABLED
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#define STM32_LSE_ENABLED FALSE
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#endif
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#ifndef STM32_CLOCK48_REQUIRED
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#define STM32_CLOCK48_REQUIRED TRUE
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#endif
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#ifndef STM32_SW
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#define STM32_SW STM32_SW_PLL
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#endif
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#ifndef STM32_PLLSRC
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#define STM32_PLLSRC STM32_PLLSRC_HSE
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#endif
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#ifndef STM32_PLLM_VALUE
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#define STM32_PLLM_VALUE 24
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#endif
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#ifndef STM32_PLLN_VALUE
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#define STM32_PLLN_VALUE 336
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#endif
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#ifndef STM32_PLLP_VALUE
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#define STM32_PLLP_VALUE 2
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#endif
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#ifndef STM32_PLLQ_VALUE
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#define STM32_PLLQ_VALUE 7
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#endif
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#define STM32_HPRE STM32_HPRE_DIV1
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#define STM32_PPRE1 STM32_PPRE1_DIV4
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#define STM32_PPRE2 STM32_PPRE2_DIV2
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#define STM32_RTCSEL STM32_RTCSEL_LSI
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#define STM32_RTCPRE_VALUE 8
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#define STM32_MCO1SEL STM32_MCO1SEL_HSI
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#define STM32_MCO1PRE STM32_MCO1PRE_DIV1
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#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK
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#define STM32_MCO2PRE STM32_MCO2PRE_DIV5
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#define STM32_I2SSRC STM32_I2SSRC_CKIN
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#define STM32_PLLI2SN_VALUE 192
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#define STM32_PLLI2SR_VALUE 5
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_BKPRAM_ENABLE FALSE
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/*
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* ADC driver system settings.
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*/
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#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC2 FALSE
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#define STM32_ADC_USE_ADC3 FALSE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC2_DMA_PRIORITY 2
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#define STM32_ADC_ADC3_DMA_PRIORITY 2
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#define STM32_ADC_IRQ_PRIORITY 6
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#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6
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#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6
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#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6
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/*
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* CAN driver system settings.
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*/
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#define STM32_CAN_USE_CAN1 FALSE
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#define STM32_CAN_USE_CAN2 FALSE
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#define STM32_CAN_CAN1_IRQ_PRIORITY 11
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#define STM32_CAN_CAN2_IRQ_PRIORITY 11
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/*
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* DAC driver system settings.
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*/
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#define STM32_DAC_DUAL_MODE FALSE
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#define STM32_DAC_USE_DAC1_CH1 FALSE
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#define STM32_DAC_USE_DAC1_CH2 FALSE
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#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
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#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
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#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
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#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
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/*
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* EXT driver system settings.
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*/
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#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI17_IRQ_PRIORITY 15
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#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI20_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI21_IRQ_PRIORITY 15
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#define STM32_EXT_EXTI22_IRQ_PRIORITY 15
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/*
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* GPT driver system settings.
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*/
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#ifndef STM32_GPT_USE_TIM1
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#define STM32_GPT_USE_TIM1 FALSE
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#endif
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#ifndef STM32_GPT_USE_TIM2
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#define STM32_GPT_USE_TIM2 FALSE
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#endif
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#ifndef STM32_GPT_USE_TIM3
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#define STM32_GPT_USE_TIM3 FALSE
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#endif
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#ifndef STM32_GPT_USE_TIM4
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#define STM32_GPT_USE_TIM4 FALSE
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#endif
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#ifndef STM32_GPT_USE_TIM5
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#define STM32_GPT_USE_TIM5 FALSE
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#endif
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#ifndef STM32_GPT_USE_TIM6
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#define STM32_GPT_USE_TIM6 FALSE
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#endif
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#ifndef STM32_GPT_USE_TIM7
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#define STM32_GPT_USE_TIM7 FALSE
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#endif
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#ifndef STM32_GPT_USE_TIM8
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#define STM32_GPT_USE_TIM8 FALSE
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#endif
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#ifndef STM32_GPT_USE_TIM9
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#define STM32_GPT_USE_TIM9 FALSE
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#endif
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#ifndef STM32_GPT_USE_TIM10
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#define STM32_GPT_USE_TIM10 FALSE
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#endif
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#ifndef STM32_GPT_USE_TIM11
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#define STM32_GPT_USE_TIM11 FALSE
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#endif
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#ifndef STM32_GPT_USE_TIM12
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#define STM32_GPT_USE_TIM12 FALSE
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#endif
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#ifndef STM32_GPT_USE_TIM13
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#define STM32_GPT_USE_TIM13 FALSE
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#endif
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#ifndef STM32_GPT_USE_TIM14
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#define STM32_GPT_USE_TIM14 FALSE
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#endif
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#define STM32_GPT_TIM1_IRQ_PRIORITY 7
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#define STM32_GPT_TIM2_IRQ_PRIORITY 7
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#define STM32_GPT_TIM3_IRQ_PRIORITY 7
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#define STM32_GPT_TIM4_IRQ_PRIORITY 7
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#define STM32_GPT_TIM5_IRQ_PRIORITY 7
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#define STM32_GPT_TIM6_IRQ_PRIORITY 7
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#define STM32_GPT_TIM7_IRQ_PRIORITY 7
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#define STM32_GPT_TIM8_IRQ_PRIORITY 7
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#define STM32_GPT_TIM9_IRQ_PRIORITY 7
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#define STM32_GPT_TIM11_IRQ_PRIORITY 7
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#define STM32_GPT_TIM12_IRQ_PRIORITY 7
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#define STM32_GPT_TIM14_IRQ_PRIORITY 7
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/*
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* I2C driver system settings.
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*/
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#define STM32_I2C_BUSY_TIMEOUT 50
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#define STM32_I2C_I2C1_IRQ_PRIORITY 5
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#define STM32_I2C_I2C2_IRQ_PRIORITY 5
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#define STM32_I2C_I2C3_IRQ_PRIORITY 5
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#define STM32_I2C_I2C1_DMA_PRIORITY 3
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#define STM32_I2C_I2C2_DMA_PRIORITY 3
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#define STM32_I2C_I2C3_DMA_PRIORITY 3
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#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
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/*
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* I2S driver system settings.
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*/
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#define STM32_I2S_SPI2_IRQ_PRIORITY 10
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#define STM32_I2S_SPI3_IRQ_PRIORITY 10
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#define STM32_I2S_SPI2_DMA_PRIORITY 1
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#define STM32_I2S_SPI3_DMA_PRIORITY 1
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#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure")
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/*
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* ICU driver system settings.
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*/
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#define STM32_ICU_TIM1_IRQ_PRIORITY 7
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#define STM32_ICU_TIM2_IRQ_PRIORITY 7
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#define STM32_ICU_TIM3_IRQ_PRIORITY 7
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#define STM32_ICU_TIM4_IRQ_PRIORITY 7
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#define STM32_ICU_TIM5_IRQ_PRIORITY 7
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#define STM32_ICU_TIM8_IRQ_PRIORITY 7
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#define STM32_ICU_TIM9_IRQ_PRIORITY 7
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/*
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* EICU driver system settings.
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*/
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#define STM32_EICU_TIM1_IRQ_PRIORITY 6
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#define STM32_EICU_TIM2_IRQ_PRIORITY 6
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#define STM32_EICU_TIM3_IRQ_PRIORITY 6
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#define STM32_EICU_TIM4_IRQ_PRIORITY 6
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#define STM32_EICU_TIM5_IRQ_PRIORITY 6
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#define STM32_EICU_TIM8_IRQ_PRIORITY 6
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#define STM32_EICU_TIM9_IRQ_PRIORITY 6
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#define STM32_EICU_TIM10_IRQ_PRIORITY 6
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#define STM32_EICU_TIM11_IRQ_PRIORITY 6
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#define STM32_EICU_TIM12_IRQ_PRIORITY 6
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#define STM32_EICU_TIM13_IRQ_PRIORITY 6
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#define STM32_EICU_TIM14_IRQ_PRIORITY 6
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/*
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* MAC driver system settings.
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*/
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#define STM32_MAC_TRANSMIT_BUFFERS 2
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#define STM32_MAC_RECEIVE_BUFFERS 4
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#define STM32_MAC_BUFFERS_SIZE 1522
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#define STM32_MAC_PHY_TIMEOUT 100
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#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE
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#define STM32_MAC_ETH1_IRQ_PRIORITY 13
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#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0
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/*
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* PWM driver system settings.
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*/
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#ifndef STM32_PWM_USE_ADVANCED
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#define STM32_PWM_USE_ADVANCED FALSE
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#endif
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#define STM32_PWM_TIM1_IRQ_PRIORITY 7
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#define STM32_PWM_TIM2_IRQ_PRIORITY 7
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#define STM32_PWM_TIM3_IRQ_PRIORITY 7
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#define STM32_PWM_TIM4_IRQ_PRIORITY 7
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#define STM32_PWM_TIM5_IRQ_PRIORITY 7
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#define STM32_PWM_TIM8_IRQ_PRIORITY 7
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#define STM32_PWM_TIM9_IRQ_PRIORITY 7
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/*
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* SDC driver system settings.
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*/
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#define STM32_SDC_SDIO_DMA_PRIORITY 3
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#define STM32_SDC_SDIO_IRQ_PRIORITY 9
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#define STM32_SDC_WRITE_TIMEOUT_MS 1000
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#define STM32_SDC_READ_TIMEOUT_MS 1000
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#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
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#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
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/*
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* SERIAL driver system settings.
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*/
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#define STM32_SERIAL_USART1_PRIORITY 11
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#define STM32_SERIAL_USART2_PRIORITY 11
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#define STM32_SERIAL_USART3_PRIORITY 11
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#define STM32_SERIAL_UART4_PRIORITY 11
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#define STM32_SERIAL_UART5_PRIORITY 11
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#define STM32_SERIAL_USART6_PRIORITY 11
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#define STM32_SERIAL_UART7_PRIORITY 11
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#define STM32_SERIAL_UART8_PRIORITY 11
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/*
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* SPI driver system settings.
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*/
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#define STM32_SPI_SPI1_DMA_PRIORITY 1
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#define STM32_SPI_SPI2_DMA_PRIORITY 1
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#define STM32_SPI_SPI3_DMA_PRIORITY 1
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#define STM32_SPI_SPI4_DMA_PRIORITY 1
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#define STM32_SPI_SPI1_IRQ_PRIORITY 10
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#define STM32_SPI_SPI2_IRQ_PRIORITY 10
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#define STM32_SPI_SPI3_IRQ_PRIORITY 10
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#define STM32_SPI_SPI4_IRQ_PRIORITY 10
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#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
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/*
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* ST driver system settings.
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*/
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#define STM32_ST_IRQ_PRIORITY 8
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#ifndef STM32_ST_USE_TIMER
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#define STM32_ST_USE_TIMER 2
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#endif
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/*
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* UART driver system settings.
|
||
|
|
*/
|
||
|
|
#define STM32_UART_USART1_IRQ_PRIORITY 12
|
||
|
|
#define STM32_UART_USART2_IRQ_PRIORITY 12
|
||
|
|
#define STM32_UART_USART3_IRQ_PRIORITY 12
|
||
|
|
#define STM32_UART_UART4_IRQ_PRIORITY 12
|
||
|
|
#define STM32_UART_UART5_IRQ_PRIORITY 12
|
||
|
|
#define STM32_UART_USART6_IRQ_PRIORITY 12
|
||
|
|
#define STM32_UART_USART1_DMA_PRIORITY 0
|
||
|
|
#define STM32_UART_USART2_DMA_PRIORITY 0
|
||
|
|
#define STM32_UART_USART3_DMA_PRIORITY 0
|
||
|
|
#define STM32_UART_UART4_DMA_PRIORITY 0
|
||
|
|
#define STM32_UART_UART5_DMA_PRIORITY 0
|
||
|
|
#define STM32_UART_USART6_DMA_PRIORITY 0
|
||
|
|
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
|
||
|
|
|
||
|
|
/*
|
||
|
|
* USB driver system settings.
|
||
|
|
*/
|
||
|
|
#ifndef STM32_USB_OTG1_IRQ_PRIORITY
|
||
|
|
#define STM32_USB_OTG1_IRQ_PRIORITY 14
|
||
|
|
#endif
|
||
|
|
#ifndef STM32_USB_OTG2_IRQ_PRIORITY
|
||
|
|
#define STM32_USB_OTG2_IRQ_PRIORITY 14
|
||
|
|
#endif
|
||
|
|
#ifndef STM32_USB_OTG1_RX_FIFO_SIZE
|
||
|
|
#define STM32_USB_OTG1_RX_FIFO_SIZE 512
|
||
|
|
#endif
|
||
|
|
#ifndef STM32_USB_OTG2_RX_FIFO_SIZE
|
||
|
|
#define STM32_USB_OTG2_RX_FIFO_SIZE 1024
|
||
|
|
#endif
|
||
|
|
#ifndef STM32_USB_OTG_THREAD_PRIO
|
||
|
|
#define STM32_USB_OTG_THREAD_PRIO LOWPRIO
|
||
|
|
#endif
|
||
|
|
#ifndef STM32_USB_OTG_THREAD_STACK_SIZE
|
||
|
|
#define STM32_USB_OTG_THREAD_STACK_SIZE 128
|
||
|
|
#endif
|
||
|
|
#ifndef STM32_USB_OTGFIFO_FILL_BASEPRI
|
||
|
|
#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/*
|
||
|
|
* WDG driver system settings.
|
||
|
|
*/
|
||
|
|
#define STM32_WDG_USE_IWDG FALSE
|