2015-08-17 21:09:52 -03:00
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/*
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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2016-03-21 12:01:53 -03:00
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#include <utility>
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2015-08-17 21:09:52 -03:00
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#include <AP_HAL/AP_HAL.h>
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2016-03-21 10:13:42 -03:00
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#include <AP_Math/AP_Math.h>
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2015-08-17 21:09:52 -03:00
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#include "AP_Compass_LSM303D.h"
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2016-03-21 10:13:42 -03:00
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extern const AP_HAL::HAL &hal;
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2015-08-17 21:09:52 -03:00
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#if CONFIG_HAL_BOARD == HAL_BOARD_LINUX
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#include <AP_HAL_Linux/GPIO.h>
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#endif
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#ifndef LSM303D_DRDY_M_PIN
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#define LSM303D_DRDY_M_PIN -1
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#endif
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/* SPI protocol address bits */
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#define DIR_READ (1<<7)
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#define DIR_WRITE (0<<7)
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#define ADDR_INCREMENT (1<<6)
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/* register addresses: A: accel, M: mag, T: temp */
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#define ADDR_WHO_AM_I 0x0F
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#define WHO_I_AM 0x49
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#define ADDR_OUT_TEMP_L 0x05
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#define ADDR_OUT_TEMP_H 0x06
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#define ADDR_STATUS_M 0x07
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#define ADDR_OUT_X_L_M 0x08
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#define ADDR_OUT_X_H_M 0x09
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#define ADDR_OUT_Y_L_M 0x0A
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#define ADDR_OUT_Y_H_M 0x0B
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#define ADDR_OUT_Z_L_M 0x0C
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#define ADDR_OUT_Z_H_M 0x0D
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#define ADDR_INT_CTRL_M 0x12
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#define ADDR_INT_SRC_M 0x13
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#define ADDR_REFERENCE_X 0x1c
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#define ADDR_REFERENCE_Y 0x1d
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#define ADDR_REFERENCE_Z 0x1e
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#define ADDR_STATUS_A 0x27
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#define ADDR_OUT_X_L_A 0x28
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#define ADDR_OUT_X_H_A 0x29
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#define ADDR_OUT_Y_L_A 0x2A
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#define ADDR_OUT_Y_H_A 0x2B
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#define ADDR_OUT_Z_L_A 0x2C
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#define ADDR_OUT_Z_H_A 0x2D
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#define ADDR_CTRL_REG0 0x1F
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#define ADDR_CTRL_REG1 0x20
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#define ADDR_CTRL_REG2 0x21
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#define ADDR_CTRL_REG3 0x22
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#define ADDR_CTRL_REG4 0x23
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#define ADDR_CTRL_REG5 0x24
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#define ADDR_CTRL_REG6 0x25
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#define ADDR_CTRL_REG7 0x26
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#define ADDR_FIFO_CTRL 0x2e
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#define ADDR_FIFO_SRC 0x2f
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#define ADDR_IG_CFG1 0x30
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#define ADDR_IG_SRC1 0x31
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#define ADDR_IG_THS1 0x32
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#define ADDR_IG_DUR1 0x33
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#define ADDR_IG_CFG2 0x34
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#define ADDR_IG_SRC2 0x35
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#define ADDR_IG_THS2 0x36
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#define ADDR_IG_DUR2 0x37
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#define ADDR_CLICK_CFG 0x38
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#define ADDR_CLICK_SRC 0x39
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#define ADDR_CLICK_THS 0x3a
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#define ADDR_TIME_LIMIT 0x3b
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#define ADDR_TIME_LATENCY 0x3c
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#define ADDR_TIME_WINDOW 0x3d
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#define ADDR_ACT_THS 0x3e
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#define ADDR_ACT_DUR 0x3f
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#define REG1_RATE_BITS_A ((1<<7) | (1<<6) | (1<<5) | (1<<4))
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#define REG1_POWERDOWN_A ((0<<7) | (0<<6) | (0<<5) | (0<<4))
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#define REG1_RATE_3_125HZ_A ((0<<7) | (0<<6) | (0<<5) | (1<<4))
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#define REG1_RATE_6_25HZ_A ((0<<7) | (0<<6) | (1<<5) | (0<<4))
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#define REG1_RATE_12_5HZ_A ((0<<7) | (0<<6) | (1<<5) | (1<<4))
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#define REG1_RATE_25HZ_A ((0<<7) | (1<<6) | (0<<5) | (0<<4))
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#define REG1_RATE_50HZ_A ((0<<7) | (1<<6) | (0<<5) | (1<<4))
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#define REG1_RATE_100HZ_A ((0<<7) | (1<<6) | (1<<5) | (0<<4))
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#define REG1_RATE_200HZ_A ((0<<7) | (1<<6) | (1<<5) | (1<<4))
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#define REG1_RATE_400HZ_A ((1<<7) | (0<<6) | (0<<5) | (0<<4))
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#define REG1_RATE_800HZ_A ((1<<7) | (0<<6) | (0<<5) | (1<<4))
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#define REG1_RATE_1600HZ_A ((1<<7) | (0<<6) | (1<<5) | (0<<4))
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#define REG1_BDU_UPDATE (1<<3)
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#define REG1_Z_ENABLE_A (1<<2)
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#define REG1_Y_ENABLE_A (1<<1)
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#define REG1_X_ENABLE_A (1<<0)
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#define REG2_ANTIALIAS_FILTER_BW_BITS_A ((1<<7) | (1<<6))
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#define REG2_AA_FILTER_BW_773HZ_A ((0<<7) | (0<<6))
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#define REG2_AA_FILTER_BW_194HZ_A ((0<<7) | (1<<6))
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#define REG2_AA_FILTER_BW_362HZ_A ((1<<7) | (0<<6))
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#define REG2_AA_FILTER_BW_50HZ_A ((1<<7) | (1<<6))
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#define REG2_FULL_SCALE_BITS_A ((1<<5) | (1<<4) | (1<<3))
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#define REG2_FULL_SCALE_2G_A ((0<<5) | (0<<4) | (0<<3))
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#define REG2_FULL_SCALE_4G_A ((0<<5) | (0<<4) | (1<<3))
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#define REG2_FULL_SCALE_6G_A ((0<<5) | (1<<4) | (0<<3))
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#define REG2_FULL_SCALE_8G_A ((0<<5) | (1<<4) | (1<<3))
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#define REG2_FULL_SCALE_16G_A ((1<<5) | (0<<4) | (0<<3))
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#define REG5_ENABLE_T (1<<7)
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#define REG5_RES_HIGH_M ((1<<6) | (1<<5))
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#define REG5_RES_LOW_M ((0<<6) | (0<<5))
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#define REG5_RATE_BITS_M ((1<<4) | (1<<3) | (1<<2))
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#define REG5_RATE_3_125HZ_M ((0<<4) | (0<<3) | (0<<2))
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#define REG5_RATE_6_25HZ_M ((0<<4) | (0<<3) | (1<<2))
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#define REG5_RATE_12_5HZ_M ((0<<4) | (1<<3) | (0<<2))
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#define REG5_RATE_25HZ_M ((0<<4) | (1<<3) | (1<<2))
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#define REG5_RATE_50HZ_M ((1<<4) | (0<<3) | (0<<2))
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#define REG5_RATE_100HZ_M ((1<<4) | (0<<3) | (1<<2))
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#define REG5_RATE_DO_NOT_USE_M ((1<<4) | (1<<3) | (0<<2))
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#define REG6_FULL_SCALE_BITS_M ((1<<6) | (1<<5))
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#define REG6_FULL_SCALE_2GA_M ((0<<6) | (0<<5))
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#define REG6_FULL_SCALE_4GA_M ((0<<6) | (1<<5))
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#define REG6_FULL_SCALE_8GA_M ((1<<6) | (0<<5))
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#define REG6_FULL_SCALE_12GA_M ((1<<6) | (1<<5))
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#define REG7_CONT_MODE_M ((0<<1) | (0<<0))
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#define INT_CTRL_M 0x12
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#define INT_SRC_M 0x13
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2016-03-21 10:13:42 -03:00
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#define LSM303D_MAG_DEFAULT_RANGE_GA 2
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2015-08-17 21:09:52 -03:00
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#define LSM303D_MAG_DEFAULT_RATE 100
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2018-08-06 19:21:27 -03:00
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AP_Compass_LSM303D::AP_Compass_LSM303D(AP_HAL::OwnPtr<AP_HAL::Device> dev)
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: _dev(std::move(dev))
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2016-03-21 10:13:42 -03:00
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{
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}
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2015-08-17 21:09:52 -03:00
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2018-08-06 19:21:27 -03:00
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AP_Compass_Backend *AP_Compass_LSM303D::probe(AP_HAL::OwnPtr<AP_HAL::Device> dev,
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enum Rotation rotation)
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2015-08-17 21:09:52 -03:00
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{
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2016-11-07 23:46:39 -04:00
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if (!dev) {
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return nullptr;
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}
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2018-08-06 19:21:27 -03:00
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AP_Compass_LSM303D *sensor = new AP_Compass_LSM303D(std::move(dev));
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2016-11-09 07:34:19 -04:00
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if (!sensor || !sensor->init(rotation)) {
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2015-08-17 21:09:52 -03:00
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delete sensor;
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2016-03-21 10:13:42 -03:00
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return nullptr;
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2015-08-17 21:09:52 -03:00
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}
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2016-03-21 10:13:42 -03:00
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2015-08-17 21:09:52 -03:00
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return sensor;
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}
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uint8_t AP_Compass_LSM303D::_register_read(uint8_t reg)
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{
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2016-03-21 12:01:53 -03:00
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uint8_t val = 0;
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2015-08-17 21:09:52 -03:00
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2016-03-21 12:01:53 -03:00
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reg |= DIR_READ;
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_dev->read_registers(reg, &val, 1);
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2015-08-17 21:09:52 -03:00
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2016-03-21 12:01:53 -03:00
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return val;
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}
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2015-08-17 21:09:52 -03:00
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2016-03-21 12:01:53 -03:00
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bool AP_Compass_LSM303D::_block_read(uint8_t reg, uint8_t *buf, uint32_t size)
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{
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reg |= DIR_READ | ADDR_INCREMENT;
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return _dev->read_registers(reg, buf, size);
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2015-08-17 21:09:52 -03:00
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}
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void AP_Compass_LSM303D::_register_write(uint8_t reg, uint8_t val)
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{
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2016-03-21 12:01:53 -03:00
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_dev->write_register(reg, val);
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2015-08-17 21:09:52 -03:00
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}
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void AP_Compass_LSM303D::_register_modify(uint8_t reg, uint8_t clearbits, uint8_t setbits)
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{
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uint8_t val;
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val = _register_read(reg);
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val &= ~clearbits;
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val |= setbits;
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_register_write(reg, val);
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}
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/**
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* Return true if the LSM303D has new data available for both the mag and
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* the accels.
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*/
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bool AP_Compass_LSM303D::_data_ready()
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{
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2016-11-03 07:03:45 -03:00
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return _drdy_pin_m == nullptr || (_drdy_pin_m->read() != 0);
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2015-08-17 21:09:52 -03:00
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}
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// Read Sensor data
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2016-03-21 12:01:53 -03:00
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bool AP_Compass_LSM303D::_read_sample()
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2015-08-17 21:09:52 -03:00
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{
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2016-03-21 12:01:53 -03:00
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struct PACKED {
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uint8_t status;
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int16_t x;
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int16_t y;
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int16_t z;
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} rx;
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2015-08-17 21:09:52 -03:00
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if (_register_read(ADDR_CTRL_REG7) != _reg7_expected) {
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2017-01-21 00:36:34 -04:00
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hal.console->printf("LSM303D _read_data_transaction_accel: _reg7_expected unexpected\n");
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2015-08-17 21:09:52 -03:00
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return false;
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}
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if (!_data_ready()) {
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return false;
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}
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2016-03-21 12:01:53 -03:00
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if (!_block_read(ADDR_STATUS_M, (uint8_t *) &rx, sizeof(rx))) {
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return false;
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}
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2015-08-17 21:09:52 -03:00
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2016-03-21 12:07:52 -03:00
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/* check for overrun */
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if ((rx.status & 0x70) != 0) {
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return false;
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}
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2016-05-16 15:14:55 -03:00
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if (rx.x == 0 && rx.y == 0 && rx.z == 0) {
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2015-08-17 21:09:52 -03:00
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return false;
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}
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2016-03-21 12:01:53 -03:00
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_mag_x = rx.x;
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_mag_y = rx.y;
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_mag_z = rx.z;
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2015-08-17 21:09:52 -03:00
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return true;
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}
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2016-11-09 07:34:19 -04:00
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bool AP_Compass_LSM303D::init(enum Rotation rotation)
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2015-08-17 21:09:52 -03:00
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{
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2016-11-03 07:03:45 -03:00
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if (LSM303D_DRDY_M_PIN >= 0) {
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_drdy_pin_m = hal.gpio->channel(LSM303D_DRDY_M_PIN);
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_drdy_pin_m->mode(HAL_GPIO_INPUT);
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2016-03-21 10:13:42 -03:00
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}
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2015-08-17 21:09:52 -03:00
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2016-03-21 12:01:53 -03:00
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bool success = _hardware_init();
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2015-08-17 21:09:52 -03:00
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2016-03-21 12:01:53 -03:00
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if (!success) {
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return false;
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}
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2015-08-17 21:09:52 -03:00
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2016-03-21 10:13:42 -03:00
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_initialised = true;
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2015-08-17 21:09:52 -03:00
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2015-09-14 10:22:23 -03:00
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/* register the compass instance in the frontend */
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2016-11-04 21:24:21 -03:00
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_dev->set_device_type(DEVTYPE_LSM303D);
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2020-05-11 06:38:28 -03:00
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if (!register_compass(_dev->get_bus_id(), _compass_instance)) {
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return false;
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}
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2016-11-04 06:24:53 -03:00
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set_dev_id(_compass_instance, _dev->get_bus_id());
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2016-03-21 10:13:42 -03:00
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2020-05-11 06:38:28 -03:00
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set_rotation(_compass_instance, rotation);
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2018-06-18 05:11:29 -03:00
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// read at 91Hz. We don't run at 100Hz as fetching data too fast can cause some very
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// odd periodic changes in the output data
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_dev->register_periodic_callback(11000, FUNCTOR_BIND_MEMBER(&AP_Compass_LSM303D::_update, void));
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2015-09-14 10:22:23 -03:00
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2016-03-21 10:13:42 -03:00
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return true;
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2015-09-14 10:22:23 -03:00
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}
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2016-03-21 10:13:42 -03:00
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bool AP_Compass_LSM303D::_hardware_init()
|
2015-08-17 21:09:52 -03:00
|
|
|
{
|
2020-05-11 06:38:28 -03:00
|
|
|
_dev->get_semaphore()->take_blocking();
|
2015-08-17 21:09:52 -03:00
|
|
|
|
|
|
|
// initially run the bus at low speed
|
2016-03-21 12:01:53 -03:00
|
|
|
_dev->set_speed(AP_HAL::Device::SPEED_LOW);
|
2015-08-17 21:09:52 -03:00
|
|
|
|
2016-03-21 12:01:53 -03:00
|
|
|
// Test WHOAMI
|
|
|
|
uint8_t whoami = _register_read(ADDR_WHO_AM_I);
|
|
|
|
if (whoami != WHO_I_AM) {
|
|
|
|
goto fail_whoami;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint8_t tries;
|
|
|
|
for (tries = 0; tries < 5; tries++) {
|
|
|
|
// ensure the chip doesn't interpret any other bus traffic as I2C
|
|
|
|
_disable_i2c();
|
2015-08-17 21:09:52 -03:00
|
|
|
|
2016-03-21 12:01:53 -03:00
|
|
|
/* enable mag */
|
|
|
|
_reg7_expected = REG7_CONT_MODE_M;
|
|
|
|
_register_write(ADDR_CTRL_REG7, _reg7_expected);
|
|
|
|
_register_write(ADDR_CTRL_REG5, REG5_RES_HIGH_M);
|
2015-08-17 21:09:52 -03:00
|
|
|
|
2016-03-21 12:01:53 -03:00
|
|
|
// DRDY on MAG on INT2
|
|
|
|
_register_write(ADDR_CTRL_REG4, 0x04);
|
2015-08-17 21:09:52 -03:00
|
|
|
|
2016-03-21 12:01:53 -03:00
|
|
|
_mag_set_range(LSM303D_MAG_DEFAULT_RANGE_GA);
|
|
|
|
_mag_set_samplerate(LSM303D_MAG_DEFAULT_RATE);
|
|
|
|
|
|
|
|
hal.scheduler->delay(10);
|
|
|
|
if (_data_ready()) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (tries == 5) {
|
2017-01-21 00:36:34 -04:00
|
|
|
hal.console->printf("Failed to boot LSM303D 5 times\n");
|
2016-03-21 12:01:53 -03:00
|
|
|
goto fail_tries;
|
|
|
|
}
|
|
|
|
|
|
|
|
_dev->set_speed(AP_HAL::Device::SPEED_HIGH);
|
|
|
|
_dev->get_semaphore()->give();
|
2015-08-17 21:09:52 -03:00
|
|
|
|
|
|
|
return true;
|
2016-03-21 12:01:53 -03:00
|
|
|
|
|
|
|
fail_tries:
|
|
|
|
fail_whoami:
|
|
|
|
_dev->get_semaphore()->give();
|
|
|
|
_dev->set_speed(AP_HAL::Device::SPEED_HIGH);
|
|
|
|
return false;
|
2015-08-17 21:09:52 -03:00
|
|
|
}
|
|
|
|
|
2017-01-13 15:26:14 -04:00
|
|
|
void AP_Compass_LSM303D::_update()
|
2015-08-17 21:09:52 -03:00
|
|
|
{
|
2016-03-21 12:01:53 -03:00
|
|
|
if (!_read_sample()) {
|
2017-01-13 15:26:14 -04:00
|
|
|
return;
|
2016-03-21 10:13:42 -03:00
|
|
|
}
|
2015-08-17 21:09:52 -03:00
|
|
|
|
2016-11-03 07:03:45 -03:00
|
|
|
Vector3f raw_field = Vector3f(_mag_x, _mag_y, _mag_z) * _mag_range_scale;
|
2015-08-17 21:09:52 -03:00
|
|
|
|
2018-09-28 15:10:22 -03:00
|
|
|
accumulate_sample(raw_field, _compass_instance, 10);
|
2015-08-17 21:09:52 -03:00
|
|
|
}
|
|
|
|
|
|
|
|
// Read Sensor data
|
|
|
|
void AP_Compass_LSM303D::read()
|
|
|
|
{
|
|
|
|
if (!_initialised) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2018-09-28 15:10:22 -03:00
|
|
|
drain_accumulated_samples(_compass_instance);
|
2015-08-17 21:09:52 -03:00
|
|
|
}
|
|
|
|
|
2016-03-21 10:13:42 -03:00
|
|
|
void AP_Compass_LSM303D::_disable_i2c()
|
2015-08-17 21:09:52 -03:00
|
|
|
{
|
|
|
|
// TODO: use the register names
|
|
|
|
uint8_t a = _register_read(0x02);
|
|
|
|
_register_write(0x02, (0x10 | a));
|
|
|
|
a = _register_read(0x02);
|
|
|
|
_register_write(0x02, (0xF7 & a));
|
|
|
|
a = _register_read(0x15);
|
|
|
|
_register_write(0x15, (0x80 | a));
|
|
|
|
a = _register_read(0x02);
|
|
|
|
_register_write(0x02, (0xE7 & a));
|
|
|
|
}
|
|
|
|
|
2016-03-21 10:13:42 -03:00
|
|
|
bool AP_Compass_LSM303D::_mag_set_range(uint8_t max_ga)
|
2015-08-17 21:09:52 -03:00
|
|
|
{
|
|
|
|
uint8_t setbits = 0;
|
|
|
|
uint8_t clearbits = REG6_FULL_SCALE_BITS_M;
|
|
|
|
float new_scale_ga_digit = 0.0f;
|
|
|
|
|
2016-03-21 10:13:42 -03:00
|
|
|
if (max_ga == 0) {
|
2015-08-17 21:09:52 -03:00
|
|
|
max_ga = 12;
|
2016-03-21 10:13:42 -03:00
|
|
|
}
|
2015-08-17 21:09:52 -03:00
|
|
|
|
|
|
|
if (max_ga <= 2) {
|
|
|
|
_mag_range_ga = 2;
|
|
|
|
setbits |= REG6_FULL_SCALE_2GA_M;
|
2015-09-14 10:22:23 -03:00
|
|
|
new_scale_ga_digit = 0.080f;
|
2015-08-17 21:09:52 -03:00
|
|
|
} else if (max_ga <= 4) {
|
|
|
|
_mag_range_ga = 4;
|
|
|
|
setbits |= REG6_FULL_SCALE_4GA_M;
|
2015-09-14 10:22:23 -03:00
|
|
|
new_scale_ga_digit = 0.160f;
|
2015-08-17 21:09:52 -03:00
|
|
|
} else if (max_ga <= 8) {
|
|
|
|
_mag_range_ga = 8;
|
|
|
|
setbits |= REG6_FULL_SCALE_8GA_M;
|
2015-09-14 10:22:23 -03:00
|
|
|
new_scale_ga_digit = 0.320f;
|
2015-08-17 21:09:52 -03:00
|
|
|
} else if (max_ga <= 12) {
|
|
|
|
_mag_range_ga = 12;
|
|
|
|
setbits |= REG6_FULL_SCALE_12GA_M;
|
2015-09-14 10:22:23 -03:00
|
|
|
new_scale_ga_digit = 0.479f;
|
2015-08-17 21:09:52 -03:00
|
|
|
} else {
|
2016-03-21 10:13:42 -03:00
|
|
|
return false;
|
2015-08-17 21:09:52 -03:00
|
|
|
}
|
|
|
|
|
|
|
|
_mag_range_scale = new_scale_ga_digit;
|
|
|
|
_register_modify(ADDR_CTRL_REG6, clearbits, setbits);
|
2016-03-21 10:13:42 -03:00
|
|
|
|
|
|
|
return true;
|
2015-08-17 21:09:52 -03:00
|
|
|
}
|
|
|
|
|
2016-03-21 10:13:42 -03:00
|
|
|
bool AP_Compass_LSM303D::_mag_set_samplerate(uint16_t frequency)
|
2015-08-17 21:09:52 -03:00
|
|
|
{
|
|
|
|
uint8_t setbits = 0;
|
|
|
|
uint8_t clearbits = REG5_RATE_BITS_M;
|
|
|
|
|
2016-03-21 10:13:42 -03:00
|
|
|
if (frequency == 0) {
|
2015-08-17 21:09:52 -03:00
|
|
|
frequency = 100;
|
2016-03-21 10:13:42 -03:00
|
|
|
}
|
2015-08-17 21:09:52 -03:00
|
|
|
|
|
|
|
if (frequency <= 25) {
|
|
|
|
setbits |= REG5_RATE_25HZ_M;
|
|
|
|
_mag_samplerate = 25;
|
|
|
|
} else if (frequency <= 50) {
|
|
|
|
setbits |= REG5_RATE_50HZ_M;
|
|
|
|
_mag_samplerate = 50;
|
|
|
|
} else if (frequency <= 100) {
|
|
|
|
setbits |= REG5_RATE_100HZ_M;
|
|
|
|
_mag_samplerate = 100;
|
|
|
|
} else {
|
2016-03-21 10:13:42 -03:00
|
|
|
return false;
|
2015-08-17 21:09:52 -03:00
|
|
|
}
|
|
|
|
|
|
|
|
_register_modify(ADDR_CTRL_REG5, clearbits, setbits);
|
2016-03-21 10:13:42 -03:00
|
|
|
|
|
|
|
return true;
|
2015-08-17 21:09:52 -03:00
|
|
|
}
|