2022-05-30 18:22:31 -03:00
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/*
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logging to a DataFlash block based storage device on SPI
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*/
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#include <AP_HAL/AP_HAL.h>
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#include "AP_Logger_W25N01GV.h"
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#if HAL_LOGGING_DATAFLASH_ENABLED
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#include <stdio.h>
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extern const AP_HAL::HAL& hal;
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#define JEDEC_WRITE_ENABLE 0x06
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#define JEDEC_WRITE_DISABLE 0x04
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#define JEDEC_READ_STATUS 0x05
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#define JEDEC_WRITE_STATUS 0x01
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#define JEDEC_READ_DATA 0x03
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#define JEDEC_PAGE_DATA_READ 0x13
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#define JEDEC_FAST_READ 0x0b
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#define JEDEC_DEVICE_ID 0x9F
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#define JEDEC_PAGE_WRITE 0x02
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#define JEDEC_PROGRAM_EXECUTE 0x10
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#define JEDEC_DEVICE_RESET 0xFF
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#define JEDEC_BLOCK_ERASE 0xD8 // 128K erase
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#define JEDEC_STATUS_BUSY 0x01
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#define JEDEC_STATUS_WRITEPROTECT 0x02
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#define W25N01G_STATUS_REG 0xC0
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#define W25N01G_PROT_REG 0xA0
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#define W25N01G_CONF_REG 0xB0
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#define W25N01G_STATUS_EFAIL 0x04
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#define W25N01G_STATUS_PFAIL 0x08
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#define W25N01G_PROT_SRP1_ENABLE (1 << 0)
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#define W25N01G_PROT_WP_E_ENABLE (1 << 1)
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#define W25N01G_PROT_TB_ENABLE (1 << 2)
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#define W25N01G_PROT_PB0_ENABLE (1 << 3)
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#define W25N01G_PROT_PB1_ENABLE (1 << 4)
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#define W25N01G_PROT_PB2_ENABLE (1 << 5)
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#define W25N01G_PROT_PB3_ENABLE (1 << 6)
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#define W25N01G_PROT_SRP2_ENABLE (1 << 7)
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#define W25N01G_CONFIG_ECC_ENABLE (1 << 4)
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#define W25N01G_CONFIG_BUFFER_READ_MODE (1 << 3)
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#define W25N01G_TIMEOUT_PAGE_READ_US 60 // tREmax = 60us (ECC enabled)
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#define W25N01G_TIMEOUT_PAGE_PROGRAM_US 700 // tPPmax = 700us
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#define W25N01G_TIMEOUT_BLOCK_ERASE_MS 10 // tBEmax = 10ms
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#define W25N01G_TIMEOUT_RESET_MS 500 // tRSTmax = 500ms
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#define W25N01G_NUM_BLOCKS 1024
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#define JEDEC_ID_WINBOND_W25N01GV 0xEFAA21
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void AP_Logger_W25N01GV::Init()
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{
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dev = hal.spi->get_device("dataflash");
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if (!dev) {
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AP_HAL::panic("PANIC: AP_Logger W25N01GV device not found");
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return;
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}
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dev_sem = dev->get_semaphore();
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if (!getSectorCount()) {
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flash_died = true;
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return;
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}
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flash_died = false;
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// reset the device
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WaitReady();
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{
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WITH_SEMAPHORE(dev_sem);
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uint8_t b = JEDEC_DEVICE_RESET;
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dev->transfer(&b, 1, nullptr, 0);
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}
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hal.scheduler->delay(W25N01G_TIMEOUT_RESET_MS);
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// disable write protection
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WriteStatusReg(W25N01G_PROT_REG, 0);
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// enable ECC and buffer mode
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WriteStatusReg(W25N01G_CONF_REG, W25N01G_CONFIG_ECC_ENABLE|W25N01G_CONFIG_BUFFER_READ_MODE);
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printf("W25N01GV status: SR-1=0x%x, SR-2=0x%x, SR-3=0x%x\n",
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ReadStatusRegBits(W25N01G_PROT_REG),
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ReadStatusRegBits(W25N01G_CONF_REG),
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ReadStatusRegBits(W25N01G_STATUS_REG));
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AP_Logger_Block::Init();
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}
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/*
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wait for busy flag to be cleared
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*/
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void AP_Logger_W25N01GV::WaitReady()
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{
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if (flash_died) {
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return;
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}
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uint32_t t = AP_HAL::millis();
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while (Busy()) {
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hal.scheduler->delay_microseconds(100);
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if (AP_HAL::millis() - t > 5000) {
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printf("DataFlash: flash_died\n");
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flash_died = true;
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break;
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}
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}
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}
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bool AP_Logger_W25N01GV::getSectorCount(void)
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{
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WaitReady();
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WITH_SEMAPHORE(dev_sem);
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// Read manufacturer ID
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uint8_t cmd = JEDEC_DEVICE_ID;
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uint8_t buf[4]; // buffer not yet allocated
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dev->transfer(&cmd, 1, buf, 4);
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uint32_t id = buf[1] << 16 | buf[2] << 8 | buf[3];
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switch (id) {
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case JEDEC_ID_WINBOND_W25N01GV:
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df_PageSize = 2048;
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df_PagePerBlock = 64;
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df_PagePerSector = 64; // make sectors equivalent to block
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break;
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default:
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hal.scheduler->delay(2000);
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printf("Unknown SPI Flash 0x%08x\n", id);
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return false;
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}
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df_NumPages = W25N01G_NUM_BLOCKS * df_PagePerBlock;
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printf("SPI Flash 0x%08x found pages=%u\n", id, df_NumPages);
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return true;
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}
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// Read the status register bits
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uint8_t AP_Logger_W25N01GV::ReadStatusRegBits(uint8_t bits)
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{
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WITH_SEMAPHORE(dev_sem);
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uint8_t cmd[2] { JEDEC_READ_STATUS, bits };
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uint8_t status;
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dev->transfer(cmd, 2, &status, 1);
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return status;
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}
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void AP_Logger_W25N01GV::WriteStatusReg(uint8_t reg, uint8_t bits)
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{
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WaitReady();
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WITH_SEMAPHORE(dev_sem);
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uint8_t cmd[3] = {JEDEC_WRITE_STATUS, reg, bits};
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dev->transfer(cmd, 3, nullptr, 0);
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}
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bool AP_Logger_W25N01GV::Busy()
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{
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uint8_t status = ReadStatusRegBits(W25N01G_STATUS_REG);
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if ((status & W25N01G_STATUS_PFAIL) != 0) {
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printf("Program failure!\n");
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}
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if ((status & W25N01G_STATUS_EFAIL) != 0) {
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printf("Erase failure!\n");
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}
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return (status & JEDEC_STATUS_BUSY) != 0;
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}
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/*
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send a command with an address
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*/
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void AP_Logger_W25N01GV::send_command_addr(uint8_t command, uint32_t PageAdr)
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{
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uint8_t cmd[4];
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cmd[0] = command;
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cmd[1] = 0; // dummy
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cmd[2] = (PageAdr >> 8) & 0xff;
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cmd[3] = (PageAdr >> 0) & 0xff;
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dev->transfer(cmd, 4, nullptr, 0);
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}
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void AP_Logger_W25N01GV::PageToBuffer(uint32_t pageNum)
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{
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if (pageNum == 0 || pageNum > df_NumPages+1) {
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printf("Invalid page read %u\n", pageNum);
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memset(buffer, 0xFF, df_PageSize);
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2022-10-01 16:48:25 -03:00
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df_Read_PageAdr = pageNum;
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2022-05-30 18:22:31 -03:00
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return;
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}
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2022-10-01 16:48:25 -03:00
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// we already just read this page
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if (pageNum == df_Read_PageAdr && read_cache_valid) {
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return;
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}
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df_Read_PageAdr = pageNum;
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2022-05-30 18:22:31 -03:00
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WaitReady();
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uint32_t PageAdr = (pageNum-1);
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{
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WITH_SEMAPHORE(dev_sem);
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// read page into internal buffer
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send_command_addr(JEDEC_PAGE_DATA_READ, PageAdr);
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}
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// read from internal buffer into our buffer
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WaitReady();
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{
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WITH_SEMAPHORE(dev_sem);
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dev->set_chip_select(true);
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uint8_t cmd[4];
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cmd[0] = JEDEC_READ_DATA;
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cmd[1] = (0 >> 8) & 0xff; // column address zero
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cmd[2] = (0 >> 0) & 0xff; // column address zero
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cmd[3] = 0; // dummy
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dev->transfer(cmd, 4, nullptr, 0);
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dev->transfer(nullptr, 0, buffer, df_PageSize);
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dev->set_chip_select(false);
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2022-10-01 16:48:25 -03:00
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read_cache_valid = true;
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2022-05-30 18:22:31 -03:00
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}
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}
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void AP_Logger_W25N01GV::BufferToPage(uint32_t pageNum)
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{
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if (pageNum == 0 || pageNum > df_NumPages+1) {
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printf("Invalid page write %u\n", pageNum);
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return;
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}
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2022-10-01 16:48:25 -03:00
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// just wrote the cached page
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if (pageNum != df_Read_PageAdr) {
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read_cache_valid = false;
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}
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2022-05-30 18:22:31 -03:00
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WriteEnable();
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uint32_t PageAdr = (pageNum-1);
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{
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WITH_SEMAPHORE(dev_sem);
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// write our buffer into internal buffer
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dev->set_chip_select(true);
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uint8_t cmd[3];
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cmd[0] = JEDEC_PAGE_WRITE;
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cmd[1] = (0 >> 8) & 0xff; // column address zero
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cmd[2] = (0 >> 0) & 0xff; // column address zero
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dev->transfer(cmd, 3, nullptr, 0);
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dev->transfer(buffer, df_PageSize, nullptr, 0);
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dev->set_chip_select(false);
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}
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// write from internal buffer into page
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{
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WITH_SEMAPHORE(dev_sem);
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send_command_addr(JEDEC_PROGRAM_EXECUTE, PageAdr);
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}
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}
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/*
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erase one sector (sizes varies with hw)
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*/
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void AP_Logger_W25N01GV::SectorErase(uint32_t blockNum)
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{
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WriteEnable();
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WITH_SEMAPHORE(dev_sem);
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uint32_t PageAdr = blockNum * df_PagePerBlock;
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send_command_addr(JEDEC_BLOCK_ERASE, PageAdr);
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}
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/*
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erase one 4k sector
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*/
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void AP_Logger_W25N01GV::Sector4kErase(uint32_t sectorNum)
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{
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SectorErase(sectorNum);
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}
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void AP_Logger_W25N01GV::StartErase()
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{
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WriteEnable();
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WITH_SEMAPHORE(dev_sem);
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// just erase the first block, others will follow in InErase
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send_command_addr(JEDEC_BLOCK_ERASE, 0);
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erase_block = 1;
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erase_start_ms = AP_HAL::millis();
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printf("Dataflash: erase started\n");
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}
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bool AP_Logger_W25N01GV::InErase()
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{
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if (erase_start_ms && !Busy()) {
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if (erase_block < W25N01G_NUM_BLOCKS) {
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SectorErase(erase_block++);
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} else {
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printf("Dataflash: erase done (%u ms)\n", AP_HAL::millis() - erase_start_ms);
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erase_start_ms = 0;
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erase_block = 0;
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}
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}
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return erase_start_ms != 0;
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}
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void AP_Logger_W25N01GV::WriteEnable(void)
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{
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WaitReady();
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WITH_SEMAPHORE(dev_sem);
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uint8_t b = JEDEC_WRITE_ENABLE;
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dev->transfer(&b, 1, nullptr, 0);
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}
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#endif // HAL_LOGGING_DATAFLASH_ENABLED
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