2018-01-05 02:19:51 -04:00
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#!/usr/bin/env python
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'''
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these tables are generated from the STM32 datasheet RM0402 in en.DM00180369.pdf for the
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STM32F412
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'''
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2018-03-05 21:33:30 -04:00
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# additional build information for ChibiOS
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build = {
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"CHIBIOS_STARTUP_MK" : "os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk",
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"CHIBIOS_PLATFORM_MK" : "os/hal/ports/STM32/STM32F4xx/platform.mk"
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}
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2018-06-03 21:53:50 -03:00
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# MCU parameters
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mcu = {
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# location of MCU serial number
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'UDID_START' : 0x1FFF7A10,
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2019-02-17 07:23:34 -04:00
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# ram map, as list of (address, size-kb, flags)
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# flags of 1 means DMA-capable
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# flags of 2 means faster memory for CPU intensive work
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'RAM_MAP' : [
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(0x20000000, 256, 1), # main memory, DMA safe
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]
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2018-06-03 21:53:50 -03:00
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}
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2018-01-05 02:19:51 -04:00
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DMA_Map = {
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2018-03-13 20:45:18 -03:00
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# format is (DMA_TABLE, StreamNum, Channel)
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# extracted from tabula-stm32f412-ref-manual-196.csv
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"ADC1" : [(2,0,0),(2,4,0)],
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"DFSDM1_FLT0" : [(2,6,3),(2,0,7)],
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"DFSDM1_FLT1" : [(2,1,3),(2,4,3)],
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"I2C1_RX" : [(1,0,1),(1,5,1)],
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"I2C1_TX" : [(1,1,0),(1,6,1),(1,7,1)],
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"I2C2_RX" : [(1,2,7),(1,3,7)],
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"I2C2_TX" : [(1,7,7)],
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"I2C3_RX" : [(1,1,1),(1,2,3)],
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"I2C3_TX" : [(1,4,3),(1,5,6)],
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"I2CFMP1_RX" : [(1,3,1),(1,0,7)],
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"I2CFMP1_TX" : [(1,1,2),(1,7,4)],
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"I2S2EXT_RX" : [(1,3,3)],
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"I2S2_EXT_TX" : [(1,4,2)],
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"I2S3_EXT_RX" : [(1,2,2),(1,0,3)],
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"I2S3_EXT_TX" : [(1,5,2)],
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"QUADSPI" : [(2,7,3)],
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"SDIO" : [(2,3,4),(2,6,4)],
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"SPI1_RX" : [(2,0,3),(2,2,3)],
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2019-12-24 21:03:01 -04:00
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"SPI1_TX" : [(2,3,3),(2,5,3)],
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2018-03-13 20:45:18 -03:00
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"SPI2_RX" : [(1,3,0)],
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"SPI2_TX" : [(1,4,0)],
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"SPI3_RX" : [(1,0,0),(1,2,0)],
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"SPI3_TX" : [(1,5,0),(1,7,0)],
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"SPI4_RX" : [(2,0,4),(2,4,4),(2,3,5)],
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"SPI4_TX" : [(2,1,4),(2,4,5)],
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"SPI5_RX" : [(2,3,2),(2,5,7)],
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"SPI5_TX" : [(2,4,2),(2,5,5),(2,6,7)],
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"TIM1_CH1" : [(2,6,0),(2,1,6),(2,3,6)],
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"TIM1_CH2" : [(2,6,0),(2,2,6)],
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"TIM1_CH3" : [(2,6,0),(2,6,6)],
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"TIM1_CH4" : [(2,4,6)],
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"TIM1_COM" : [(2,4,6)],
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"TIM1_TRIG" : [(2,0,6),(2,4,6)],
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"TIM1_UP" : [(2,5,6)],
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"TIM2_CH1" : [(1,5,3)],
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"TIM2_CH2" : [(1,6,3)],
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"TIM2_CH3" : [(1,1,3)],
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"TIM2_CH4" : [(1,6,3),(1,7,3)],
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"TIM2_UP" : [(1,1,3),(1,7,3)],
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"TIM3_CH1" : [(1,4,5)],
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"TIM3_CH2" : [(1,5,5)],
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"TIM3_CH3" : [(1,7,5)],
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"TIM3_CH4" : [(1,2,5)],
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"TIM3_TRIG" : [(1,4,5)],
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"TIM3_UP" : [(1,2,5)],
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"TIM4_CH1" : [(1,0,2)],
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"TIM4_CH2" : [(1,3,2)],
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"TIM4_CH3" : [(1,7,2)],
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"TIM4_UP" : [(1,6,2)],
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"TIM5_CH1" : [(1,2,6)],
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"TIM5_CH2" : [(1,4,6)],
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"TIM5_CH3" : [(1,0,6)],
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"TIM5_CH4" : [(1,1,6),(1,3,6)],
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"TIM5_TRIG" : [(1,1,6),(1,3,6)],
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"TIM5_UP" : [(1,0,6),(1,6,6)],
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"TIM6_UP" : [(1,1,7)],
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"TIM7_UP" : [(1,2,1),(1,4,1)],
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"TIM8_CH1" : [(2,2,0),(2,2,7)],
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"TIM8_CH2" : [(2,2,0),(2,3,7)],
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"TIM8_CH3" : [(2,2,0),(2,4,7)],
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"TIM8_CH4" : [(2,7,7)],
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"TIM8_COM" : [(2,7,7)],
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"TIM8_TRIG" : [(2,7,7)],
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"TIM8_UP" : [(2,1,7)],
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"USART1_RX" : [(2,2,4),(2,5,4)],
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"USART1_TX" : [(2,7,4)],
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"USART2_RX" : [(1,5,4),(1,7,6)],
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"USART2_TX" : [(1,6,4)],
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"USART3_RX" : [(1,1,4)],
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"USART3_TX" : [(1,3,4),(1,4,7)],
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"USART6_RX" : [(2,1,5),(2,2,5)],
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"USART6_TX" : [(2,6,5),(2,7,5)],
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2018-01-05 02:19:51 -04:00
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}
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2018-03-13 20:45:18 -03:00
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2018-01-05 02:19:51 -04:00
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'''
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tables generated using af_parse.py and tabula
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'''
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AltFunction_map = {
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# format is PIN:FUNCTION : AFNUM
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# extracted from tabula-AF-F412RG.csv
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"PA0:EVENTOUT" : 15,
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"PA0:TIM2_CH1" : 1,
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"PA0:TIM2_ETR" : 1,
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"PA0:TIM5_CH1" : 2,
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"PA0:TIM8_ETR" : 3,
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"PA0:USART2_CTS" : 7,
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"PA10:EVENTOUT" : 15,
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"PA10:I2S5_SD" : 6,
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"PA10:SPI5_MOSI" : 6,
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"PA10:TIM1_CH3" : 1,
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"PA10:USART1_RX" : 7,
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"PA10:USB_FS_ID" : 10,
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"PA11:CAN1_RX" : 9,
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"PA11:EVENTOUT" : 15,
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"PA11:SPI4_MISO" : 6,
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"PA11:TIM1_CH4" : 1,
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"PA11:USART1_CTS" : 7,
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"PA11:USART6_TX" : 8,
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"PA11:USB_FS_DM" : 10,
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"PA12:CAN1_TX" : 9,
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"PA12:EVENTOUT" : 15,
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"PA12:SPI5_MISO" : 6,
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"PA12:TIM1_ETR" : 1,
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"PA12:USART1_RTS" : 7,
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"PA12:USART6_RX" : 8,
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"PA12:USB_FS_DP" : 10,
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"PA13:EVENTOUT" : 15,
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"PA13:JTMS-SWDIO" : 0,
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"PA14:EVENTOUT" : 15,
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"PA14:JTCK-SWCLK" : 0,
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"PA15:EVENTOUT" : 15,
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"PA15:I2S1_WS" : 5,
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"PA15:I2S3_WS" : 6,
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"PA15:JTDI" : 0,
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"PA15:SPI1_NSS" : 5,
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"PA15:SPI3_NSS" : 6,
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"PA15:TIM2_CH1" : 1,
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"PA15:TIM2_ETR" : 1,
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"PA15:USART1_TX" : 7,
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"PA1:EVENTOUT" : 15,
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"PA1:I2S4_SD" : 5,
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"PA1:QUADSPI_BK1_IO3" : 9,
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"PA1:SPI4_MOSI" : 5,
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"PA1:TIM2_CH2" : 1,
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"PA1:TIM5_CH2" : 2,
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"PA1:USART2_RTS" : 7,
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"PA2:EVENTOUT" : 15,
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"PA2:FSMC_D4" : 12,
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"PA2:I2S2_CKIN" : 5,
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"PA2:TIM2_CH3" : 1,
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"PA2:TIM5_CH3" : 2,
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"PA2:TIM9_CH1" : 3,
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"PA2:USART2_TX" : 7,
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"PA3:EVENTOUT" : 15,
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"PA3:FSMC_D5" : 12,
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"PA3:I2S2_MCK" : 5,
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"PA3:TIM2_CH4" : 1,
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"PA3:TIM5_CH4" : 2,
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"PA3:TIM9_CH2" : 3,
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"PA3:USART2_RX" : 7,
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"PA4:DFSDM1_DATIN1" : 8,
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"PA4:EVENTOUT" : 15,
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"PA4:FSMC_D6" : 12,
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"PA4:I2S1_WS" : 5,
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"PA4:I2S3_WS" : 6,
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"PA4:SPI1_NSS" : 5,
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"PA4:SPI3_NSS" : 6,
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"PA4:USART2_CK" : 7,
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"PA5:DFSDM1_CKIN1" : 8,
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"PA5:EVENTOUT" : 15,
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"PA5:FSMC_D7" : 12,
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"PA5:I2S1_CK" : 5,
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"PA5:SPI1_SCK" : 5,
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"PA5:TIM2_CH1" : 1,
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"PA5:TIM2_ETR" : 1,
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"PA5:TIM8_CH1N" : 3,
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"PA6:EVENTOUT" : 15,
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"PA6:I2S2_MCK" : 6,
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"PA6:QUADSPI_BK2_IO0" : 10,
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"PA6:SDIO_CMD" : 12,
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"PA6:SPI1_MISO" : 5,
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"PA6:TIM13_CH1" : 9,
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"PA6:TIM1_BKIN" : 1,
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"PA6:TIM3_CH1" : 2,
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"PA6:TIM8_BKIN" : 3,
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"PA7:EVENTOUT" : 15,
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"PA7:I2S1_SD" : 5,
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"PA7:QUADSPI_BK2_IO1" : 10,
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"PA7:SPI1_MOSI" : 5,
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"PA7:TIM14_CH1" : 9,
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"PA7:TIM1_CH1N" : 1,
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"PA7:TIM3_CH2" : 2,
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"PA7:TIM8_CH1N" : 3,
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"PA8:EVENTOUT" : 15,
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"PA8:I2C3_SCL" : 4,
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"PA8:MCO_1" : 0,
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"PA8:SDIO_D1" : 12,
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"PA8:TIM1_CH1" : 1,
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"PA8:USART1_CK" : 7,
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"PA8:USB_FS_SOF" : 10,
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"PA9:EVENTOUT" : 15,
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"PA9:I2C3_SMBA" : 4,
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"PA9:SDIO_D2" : 12,
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"PA9:TIM1_CH2" : 1,
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"PA9:USART1_TX" : 7,
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"PA9:USB_FS_VBUS" : 10,
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"PB0:EVENTOUT" : 15,
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"PB0:I2S5_CK" : 6,
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"PB0:SPI5_SCK" : 6,
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"PB0:TIM1_CH2N" : 1,
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"PB0:TIM3_CH3" : 2,
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"PB0:TIM8_CH2N" : 3,
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"PB10:EVENTOUT" : 15,
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"PB10:I2C2_SCL" : 4,
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"PB10:I2CFMP1_SCL" : 9,
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"PB10:I2S2_CK" : 5,
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"PB10:I2S3_MCK" : 6,
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"PB10:SDIO_D7" : 12,
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"PB10:SPI2_SCK" : 5,
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"PB10:TIM2_CH3" : 1,
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"PB10:USART3_TX" : 7,
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"PB11:EVENTOUT" : 15,
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"PB11:I2C2_SDA" : 4,
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"PB11:I2S2_CKIN" : 5,
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"PB11:TIM2_CH4" : 1,
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"PB11:USART3_RX" : 7,
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"PB12:CAN2_RX" : 9,
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"PB12:DFSDM1_DATIN1" : 10,
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"PB12:EVENTOUT" : 15,
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"PB12:FSMC_D13" : 12,
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"PB12:FSMC_DA13" : 12,
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"PB12:I2C2_SMBA" : 4,
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"PB12:I2S2_WS" : 5,
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"PB12:I2S3_CK" : 7,
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"PB12:I2S4_WS" : 6,
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"PB12:SPI2_NSS" : 5,
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"PB12:SPI3_SCK" : 7,
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"PB12:SPI4_NSS" : 6,
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"PB12:TIM1_BKIN" : 1,
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"PB12:USART3_CK" : 8,
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"PB13:CAN2_TX" : 9,
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"PB13:DFSDM1_CKIN1" : 10,
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"PB13:EVENTOUT" : 15,
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"PB13:I2CFMP1_SMBA" : 4,
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"PB13:I2S2_CK" : 5,
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"PB13:I2S4_CK" : 6,
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"PB13:SPI2_SCK" : 5,
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"PB13:SPI4_SCK" : 6,
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"PB13:TIM1_CH1N" : 1,
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"PB13:USART3_CTS" : 8,
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"PB14:DFSDM1_DATIN2" : 8,
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"PB14:EVENTOUT" : 15,
|
|
|
|
|
"PB14:FSMC_D0" : 10,
|
|
|
|
|
"PB14:I2CFMP1_SDA" : 4,
|
|
|
|
|
"PB14:I2S2EXT_SD" : 6,
|
|
|
|
|
"PB14:SDIO_D6" : 12,
|
|
|
|
|
"PB14:SPI2_MISO" : 5,
|
|
|
|
|
"PB14:TIM12_CH1" : 9,
|
|
|
|
|
"PB14:TIM1_CH2N" : 1,
|
|
|
|
|
"PB14:TIM8_CH2N" : 3,
|
|
|
|
|
"PB14:USART3_RTS" : 7,
|
|
|
|
|
"PB15:DFSDM1_CKIN2" : 8,
|
|
|
|
|
"PB15:EVENTOUT" : 15,
|
|
|
|
|
"PB15:I2CFMP1_SCL" : 4,
|
|
|
|
|
"PB15:I2S2_SD" : 5,
|
|
|
|
|
"PB15:RTC_50HZ" : 0,
|
|
|
|
|
"PB15:SDIO_CK" : 12,
|
|
|
|
|
"PB15:SPI2_MOSI" : 5,
|
|
|
|
|
"PB15:TIM12_CH2" : 9,
|
|
|
|
|
"PB15:TIM1_CH3N" : 1,
|
|
|
|
|
"PB15:TIM8_CH3N" : 3,
|
|
|
|
|
"PB1:DFSDM1_DATIN0" : 8,
|
|
|
|
|
"PB1:EVENTOUT" : 15,
|
|
|
|
|
"PB1:I2S5_WS" : 6,
|
|
|
|
|
"PB1:QUADSPI_CLK" : 9,
|
|
|
|
|
"PB1:SPI5_NSS" : 6,
|
|
|
|
|
"PB1:TIM1_CH3N" : 1,
|
|
|
|
|
"PB1:TIM3_CH4" : 2,
|
|
|
|
|
"PB1:TIM8_CH3N" : 3,
|
|
|
|
|
"PB2:DFSDM1_CKIN0" : 6,
|
|
|
|
|
"PB2:EVENTOUT" : 15,
|
|
|
|
|
"PB2:QUADSPI_CLK" : 9,
|
|
|
|
|
"PB3:" : 3,
|
|
|
|
|
"PB3:EVENTOUT" : 15,
|
|
|
|
|
"PB3:I2C2_SDA" : 9,
|
|
|
|
|
"PB3:I2CFMP1_SDA" : 4,
|
|
|
|
|
"PB3:I2S1_CK" : 5,
|
|
|
|
|
"PB3:I2S3_CK" : 6,
|
|
|
|
|
"PB3:JTDO-SWO" : 0,
|
|
|
|
|
"PB3:SPI1_SCK" : 5,
|
|
|
|
|
"PB3:SPI3_SCK" : 6,
|
|
|
|
|
"PB3:TIM2_CH2" : 1,
|
|
|
|
|
"PB3:USART1_RX" : 7,
|
|
|
|
|
"PB4:EVENTOUT" : 15,
|
|
|
|
|
"PB4:I2C3_SDA" : 9,
|
|
|
|
|
"PB4:I2S3EXT_SD" : 7,
|
|
|
|
|
"PB4:JTRST" : 0,
|
|
|
|
|
"PB4:SDIO_D0" : 12,
|
|
|
|
|
"PB4:SPI1_MISO" : 5,
|
|
|
|
|
"PB4:SPI3_MISO" : 6,
|
|
|
|
|
"PB4:TIM3_CH1" : 2,
|
|
|
|
|
"PB5:CAN2_RX" : 9,
|
|
|
|
|
"PB5:EVENTOUT" : 15,
|
|
|
|
|
"PB5:I2C1_SMBA" : 4,
|
|
|
|
|
"PB5:I2S1_SD" : 5,
|
|
|
|
|
"PB5:I2S3_SD" : 6,
|
|
|
|
|
"PB5:SDIO_D3" : 12,
|
|
|
|
|
"PB5:SPI1_MOSI" : 5,
|
|
|
|
|
"PB5:SPI3_MOSI" : 6,
|
|
|
|
|
"PB5:TIM3_CH2" : 2,
|
|
|
|
|
"PB6:CAN2_TX" : 9,
|
|
|
|
|
"PB6:EVENTOUT" : 15,
|
|
|
|
|
"PB6:I2C1_SCL" : 4,
|
|
|
|
|
"PB6:QUADSPI_BK1_NCS" : 10,
|
|
|
|
|
"PB6:SDIO_D0" : 12,
|
|
|
|
|
"PB6:TIM4_CH1" : 2,
|
|
|
|
|
"PB6:USART1_TX" : 7,
|
|
|
|
|
"PB7:EVENTOUT" : 15,
|
|
|
|
|
"PB7:FSMC_NL" : 12,
|
|
|
|
|
"PB7:I2C1_SDA" : 4,
|
|
|
|
|
"PB7:TIM4_CH2" : 2,
|
|
|
|
|
"PB7:USART1_RX" : 7,
|
|
|
|
|
"PB8:CAN1_RX" : 8,
|
|
|
|
|
"PB8:EVENTOUT" : 15,
|
|
|
|
|
"PB8:I2C1_SCL" : 4,
|
|
|
|
|
"PB8:I2C3_SDA" : 9,
|
|
|
|
|
"PB8:I2S5_SD" : 6,
|
|
|
|
|
"PB8:SDIO_D4" : 12,
|
|
|
|
|
"PB8:SPI5_MOSI" : 6,
|
|
|
|
|
"PB8:TIM10_CH1" : 3,
|
|
|
|
|
"PB8:TIM4_CH3" : 2,
|
|
|
|
|
"PB9:CAN1_TX" : 8,
|
|
|
|
|
"PB9:EVENTOUT" : 15,
|
|
|
|
|
"PB9:I2C1_SDA" : 4,
|
|
|
|
|
"PB9:I2C2_SDA" : 9,
|
|
|
|
|
"PB9:I2S2_WS" : 5,
|
|
|
|
|
"PB9:SDIO_D5" : 12,
|
|
|
|
|
"PB9:SPI2_NSS" : 5,
|
|
|
|
|
"PB9:TIM11_CH1" : 3,
|
|
|
|
|
"PB9:TIM4_CH4" : 2,
|
|
|
|
|
"PC0:EVENTOUT" : 15,
|
|
|
|
|
"PC10:EVENTOUT" : 15,
|
|
|
|
|
"PC10:I2S3_CK" : 6,
|
|
|
|
|
"PC10:QUADSPI_BK1_IO1" : 9,
|
|
|
|
|
"PC10:SDIO_D2" : 12,
|
|
|
|
|
"PC10:SPI3_SCK" : 6,
|
|
|
|
|
"PC10:USART3_TX" : 7,
|
|
|
|
|
"PC11:EVENTOUT" : 15,
|
|
|
|
|
"PC11:FSMC_D2" : 10,
|
|
|
|
|
"PC11:I2S3EXT_SD" : 5,
|
|
|
|
|
"PC11:QUADSPI_BK2_NCS" : 9,
|
|
|
|
|
"PC11:SDIO_D3" : 12,
|
|
|
|
|
"PC11:SPI3_MISO" : 6,
|
|
|
|
|
"PC11:USART3_RX" : 7,
|
|
|
|
|
"PC12:EVENTOUT" : 15,
|
|
|
|
|
"PC12:FSMC_D3" : 10,
|
|
|
|
|
"PC12:I2S3_SD" : 6,
|
|
|
|
|
"PC12:SDIO_CK" : 12,
|
|
|
|
|
"PC12:SPI3_MOSI" : 6,
|
|
|
|
|
"PC12:USART3_CK" : 7,
|
|
|
|
|
"PC13:EVENTOUT" : 15,
|
|
|
|
|
"PC14:EVENTOUT" : 15,
|
|
|
|
|
"PC15:EVENTOUT" : 15,
|
|
|
|
|
"PC1:EVENTOUT" : 15,
|
|
|
|
|
"PC2:DFSDM1_CKOUT" : 8,
|
|
|
|
|
"PC2:EVENTOUT" : 15,
|
|
|
|
|
"PC2:FSMC_NWE" : 12,
|
|
|
|
|
"PC2:I2S2EXT_SD" : 6,
|
|
|
|
|
"PC2:SPI2_MISO" : 5,
|
|
|
|
|
"PC3:EVENTOUT" : 15,
|
|
|
|
|
"PC3:FSMC_A0" : 12,
|
|
|
|
|
"PC3:I2S2_SD" : 5,
|
|
|
|
|
"PC3:SPI2_MOSI" : 5,
|
|
|
|
|
"PC4:EVENTOUT" : 15,
|
|
|
|
|
"PC4:FSMC_NE4" : 12,
|
|
|
|
|
"PC4:I2S1_MCK" : 5,
|
|
|
|
|
"PC4:QUADSPI_BK2_IO2" : 10,
|
|
|
|
|
"PC5:EVENTOUT" : 15,
|
|
|
|
|
"PC5:FSMC_NOE" : 12,
|
|
|
|
|
"PC5:I2CFMP1_SMBA" : 4,
|
|
|
|
|
"PC5:QUADSPI_BK2_IO3" : 10,
|
|
|
|
|
"PC5:USART3_RX" : 7,
|
|
|
|
|
"PC6:DFSDM1_CKIN3" : 6,
|
|
|
|
|
"PC6:EVENTOUT" : 15,
|
|
|
|
|
"PC6:FSMC_D1" : 10,
|
|
|
|
|
"PC6:I2CFMP1_SCL" : 4,
|
|
|
|
|
"PC6:I2S2_MCK" : 5,
|
|
|
|
|
"PC6:SDIO_D6" : 12,
|
|
|
|
|
"PC6:TIM3_CH1" : 2,
|
|
|
|
|
"PC6:TIM8_CH1" : 3,
|
|
|
|
|
"PC6:USART6_TX" : 8,
|
|
|
|
|
"PC7:DFSDM1_DATIN3" : 10,
|
|
|
|
|
"PC7:EVENTOUT" : 15,
|
|
|
|
|
"PC7:I2CFMP1_SDA" : 4,
|
|
|
|
|
"PC7:I2S2_CK" : 5,
|
|
|
|
|
"PC7:I2S3_MCK" : 6,
|
|
|
|
|
"PC7:SDIO_D7" : 12,
|
|
|
|
|
"PC7:SPI2_SCK" : 5,
|
|
|
|
|
"PC7:TIM3_CH2" : 2,
|
|
|
|
|
"PC7:TIM8_CH2" : 3,
|
|
|
|
|
"PC7:USART6_RX" : 8,
|
|
|
|
|
"PC8:EVENTOUT" : 15,
|
|
|
|
|
"PC8:QUADSPI_BK1_IO2" : 9,
|
|
|
|
|
"PC8:SDIO_D0" : 12,
|
|
|
|
|
"PC8:TIM3_CH3" : 2,
|
|
|
|
|
"PC8:TIM8_CH3" : 3,
|
|
|
|
|
"PC8:USART6_CK" : 8,
|
|
|
|
|
"PC9:EVENTOUT" : 15,
|
|
|
|
|
"PC9:I2C3_SDA" : 4,
|
|
|
|
|
"PC9:I2S2_CKIN" : 5,
|
|
|
|
|
"PC9:MCO_2" : 0,
|
|
|
|
|
"PC9:QUADSPI_BK1_IO0" : 9,
|
|
|
|
|
"PC9:SDIO_D1" : 12,
|
|
|
|
|
"PC9:TIM3_CH4" : 2,
|
|
|
|
|
"PC9:TIM8_CH4" : 3,
|
|
|
|
|
"PD0:CAN1_RX" : 9,
|
|
|
|
|
"PD0:EVENTOUT" : 15,
|
|
|
|
|
"PD0:FSMC_D2" : 12,
|
|
|
|
|
"PD0:FSMC_DA2" : 12,
|
|
|
|
|
"PD10:EVENTOUT" : 15,
|
|
|
|
|
"PD10:FSMC_D15" : 12,
|
|
|
|
|
"PD10:FSMC_DA15" : 12,
|
|
|
|
|
"PD10:USART3_CK" : 7,
|
|
|
|
|
"PD11:EVENTOUT" : 15,
|
|
|
|
|
"PD11:FSMC_A16" : 12,
|
|
|
|
|
"PD11:I2CFMP1_SMBA" : 4,
|
|
|
|
|
"PD11:QUADSPI_BK1_IO0" : 9,
|
|
|
|
|
"PD11:USART3_CTS" : 7,
|
|
|
|
|
"PD12:" : 6,
|
|
|
|
|
"PD12:EVENTOUT" : 15,
|
|
|
|
|
"PD12:FSMC_A17" : 12,
|
|
|
|
|
"PD12:I2CFMP1_SCL" : 4,
|
|
|
|
|
"PD12:QUADSPI_BK1_IO1" : 9,
|
|
|
|
|
"PD12:TIM4_CH1" : 2,
|
|
|
|
|
"PD12:USART3_RTS" : 7,
|
|
|
|
|
"PD13:EVENTOUT" : 15,
|
|
|
|
|
"PD13:FSMC_A18" : 12,
|
|
|
|
|
"PD13:I2CFMP1_SDA" : 4,
|
|
|
|
|
"PD13:QUADSPI_BK1_IO3" : 9,
|
|
|
|
|
"PD13:TIM4_CH2" : 2,
|
|
|
|
|
"PD14:EVENTOUT" : 15,
|
|
|
|
|
"PD14:FSMC_D0" : 12,
|
|
|
|
|
"PD14:FSMC_DA0" : 12,
|
|
|
|
|
"PD14:I2CFMP1_SCL" : 4,
|
|
|
|
|
"PD14:TIM4_CH3" : 2,
|
|
|
|
|
"PD15:EVENTOUT" : 15,
|
|
|
|
|
"PD15:FSMC_D1" : 12,
|
|
|
|
|
"PD15:FSMC_DA1" : 12,
|
|
|
|
|
"PD15:I2CFMP1_SDA" : 4,
|
|
|
|
|
"PD15:TIM4_CH4" : 2,
|
|
|
|
|
"PD1:CAN1_TX" : 9,
|
|
|
|
|
"PD1:EVENTOUT" : 15,
|
|
|
|
|
"PD1:FSMC_D3" : 12,
|
|
|
|
|
"PD1:FSMC_DA3" : 12,
|
|
|
|
|
"PD2:EVENTOUT" : 15,
|
|
|
|
|
"PD2:FSMC_NWE" : 10,
|
|
|
|
|
"PD2:SDIO_CMD" : 12,
|
|
|
|
|
"PD2:TIM3_ETR" : 2,
|
|
|
|
|
"PD3:DFSDM1_DATIN0" : 6,
|
|
|
|
|
"PD3:EVENTOUT" : 15,
|
|
|
|
|
"PD3:FSMC_CLK" : 12,
|
|
|
|
|
"PD3:I2S2_CK" : 5,
|
|
|
|
|
"PD3:QUADSPI_CLK" : 9,
|
|
|
|
|
"PD3:SPI2_SCK" : 5,
|
|
|
|
|
"PD3:TRACED1" : 0,
|
|
|
|
|
"PD3:USART2_CTS" : 7,
|
|
|
|
|
"PD4:DFSDM1_CKIN0" : 6,
|
|
|
|
|
"PD4:EVENTOUT" : 15,
|
|
|
|
|
"PD4:FSMC_NOE" : 12,
|
|
|
|
|
"PD4:USART2_RTS" : 7,
|
|
|
|
|
"PD5:EVENTOUT" : 15,
|
|
|
|
|
"PD5:FSMC_NWE" : 12,
|
|
|
|
|
"PD5:USART2_TX" : 7,
|
|
|
|
|
"PD6:DFSDM1_DATIN1" : 6,
|
|
|
|
|
"PD6:EVENTOUT" : 15,
|
|
|
|
|
"PD6:FSMC_NWAIT" : 12,
|
|
|
|
|
"PD6:I2S3_SD" : 5,
|
|
|
|
|
"PD6:SPI3_MOSI" : 5,
|
|
|
|
|
"PD6:USART2_RX" : 7,
|
|
|
|
|
"PD7:DFSDM1_CKIN1" : 6,
|
|
|
|
|
"PD7:EVENTOUT" : 15,
|
|
|
|
|
"PD7:FSMC_NE1" : 12,
|
|
|
|
|
"PD7:USART2_CK" : 7,
|
|
|
|
|
"PD8:EVENTOUT" : 15,
|
|
|
|
|
"PD8:FSMC_D13" : 12,
|
|
|
|
|
"PD8:FSMC_DA13" : 12,
|
|
|
|
|
"PD8:USART3_TX" : 7,
|
|
|
|
|
"PD9:EVENTOUT" : 15,
|
|
|
|
|
"PD9:FSMC_D14" : 12,
|
|
|
|
|
"PD9:FSMC_DA14" : 12,
|
|
|
|
|
"PD9:USART3_RX" : 7,
|
|
|
|
|
"PE0:EVENTOUT" : 15,
|
|
|
|
|
"PE0:FSMC_NBL0" : 12,
|
|
|
|
|
"PE0:TIM4_ETR" : 2,
|
|
|
|
|
"PE10:EVENTOUT" : 15,
|
|
|
|
|
"PE10:FSMC_D7" : 12,
|
|
|
|
|
"PE10:FSMC_DA7" : 12,
|
|
|
|
|
"PE10:QUADSPI_BK2_IO3" : 10,
|
|
|
|
|
"PE10:TIM1_CH2N" : 1,
|
|
|
|
|
"PE11:" : 10,
|
|
|
|
|
"PE11:EVENTOUT" : 15,
|
|
|
|
|
"PE11:FSMC_D8" : 12,
|
|
|
|
|
"PE11:FSMC_DA8" : 12,
|
|
|
|
|
"PE11:I2S4_WS" : 5,
|
|
|
|
|
"PE11:I2S5_WS" : 6,
|
|
|
|
|
"PE11:SPI4_NSS" : 5,
|
|
|
|
|
"PE11:SPI5_NSS" : 6,
|
|
|
|
|
"PE11:TIM1_CH2" : 1,
|
|
|
|
|
"PE12:EVENTOUT" : 15,
|
|
|
|
|
"PE12:FSMC_D9" : 12,
|
|
|
|
|
"PE12:FSMC_DA9" : 12,
|
|
|
|
|
"PE12:I2S4_CK" : 5,
|
|
|
|
|
"PE12:I2S5_CK" : 6,
|
|
|
|
|
"PE12:SPI4_SCK" : 5,
|
|
|
|
|
"PE12:SPI5_SCK" : 6,
|
|
|
|
|
"PE12:TIM1_CH3N" : 1,
|
|
|
|
|
"PE13:EVENTOUT" : 15,
|
|
|
|
|
"PE13:FSMC_D10" : 12,
|
|
|
|
|
"PE13:FSMC_DA10" : 12,
|
|
|
|
|
"PE13:SPI4_MISO" : 5,
|
|
|
|
|
"PE13:SPI5_MISO" : 6,
|
|
|
|
|
"PE13:TIM1_CH3" : 1,
|
|
|
|
|
"PE14:EVENTOUT" : 15,
|
|
|
|
|
"PE14:FSMC_D11" : 12,
|
|
|
|
|
"PE14:FSMC_DA11" : 12,
|
|
|
|
|
"PE14:I2S4_SD" : 5,
|
|
|
|
|
"PE14:I2S5_SD" : 6,
|
|
|
|
|
"PE14:SPI4_MOSI" : 5,
|
|
|
|
|
"PE14:SPI5_MOSI" : 6,
|
|
|
|
|
"PE14:TIM1_CH4" : 1,
|
|
|
|
|
"PE15:EVENTOUT" : 15,
|
|
|
|
|
"PE15:FSMC_D12" : 12,
|
|
|
|
|
"PE15:FSMC_DA12" : 12,
|
|
|
|
|
"PE15:TIM1_BKIN" : 1,
|
|
|
|
|
"PE1:EVENTOUT" : 15,
|
|
|
|
|
"PE1:FSMC_NBL1" : 12,
|
|
|
|
|
"PE2:EVENTOUT" : 15,
|
|
|
|
|
"PE2:FSMC_A23" : 12,
|
|
|
|
|
"PE2:I2S4_CK" : 5,
|
|
|
|
|
"PE2:I2S5_CK" : 6,
|
|
|
|
|
"PE2:QUADSPI_BK1_IO2" : 9,
|
|
|
|
|
"PE2:SPI4_SCK" : 5,
|
|
|
|
|
"PE2:SPI5_SCK" : 6,
|
|
|
|
|
"PE2:TRACECLK" : 0,
|
|
|
|
|
"PE3:EVENTOUT" : 15,
|
|
|
|
|
"PE3:FSMC_A19" : 12,
|
|
|
|
|
"PE3:TRACED0" : 0,
|
|
|
|
|
"PE4:DFSDM1_DATIN3" : 8,
|
|
|
|
|
"PE4:EVENTOUT" : 15,
|
|
|
|
|
"PE4:FSMC_A20" : 12,
|
|
|
|
|
"PE4:I2S4_WS" : 5,
|
|
|
|
|
"PE4:I2S5_WS" : 6,
|
|
|
|
|
"PE4:SPI4_NSS" : 5,
|
|
|
|
|
"PE4:SPI5_NSS" : 6,
|
|
|
|
|
"PE4:TRACED1" : 0,
|
|
|
|
|
"PE5:DFSDM1_CKIN3" : 8,
|
|
|
|
|
"PE5:EVENTOUT" : 15,
|
|
|
|
|
"PE5:FSMC_A21" : 12,
|
|
|
|
|
"PE5:SPI4_MISO" : 5,
|
|
|
|
|
"PE5:SPI5_MISO" : 6,
|
|
|
|
|
"PE5:TIM9_CH1" : 3,
|
|
|
|
|
"PE5:TRACED2" : 0,
|
|
|
|
|
"PE6:EVENTOUT" : 15,
|
|
|
|
|
"PE6:FSMC_A22" : 12,
|
|
|
|
|
"PE6:I2S4_SD" : 5,
|
|
|
|
|
"PE6:I2S5_SD" : 6,
|
|
|
|
|
"PE6:SPI4_MOSI" : 5,
|
|
|
|
|
"PE6:SPI5_MOSI" : 6,
|
|
|
|
|
"PE6:TIM9_CH2" : 3,
|
|
|
|
|
"PE6:TRACED3" : 0,
|
|
|
|
|
"PE7:DFSDM1_DATIN2" : 6,
|
|
|
|
|
"PE7:EVENTOUT" : 15,
|
|
|
|
|
"PE7:FSMC_D4" : 12,
|
|
|
|
|
"PE7:FSMC_DA4" : 12,
|
|
|
|
|
"PE7:QUADSPI_BK2_IO0" : 10,
|
|
|
|
|
"PE7:TIM1_ETR" : 1,
|
|
|
|
|
"PE8:DFSDM1_CKIN2" : 6,
|
|
|
|
|
"PE8:EVENTOUT" : 15,
|
|
|
|
|
"PE8:FSMC_D5" : 12,
|
|
|
|
|
"PE8:FSMC_DA5" : 12,
|
|
|
|
|
"PE8:QUADSPI_BK2_IO1" : 10,
|
|
|
|
|
"PE8:TIM1_CH1N" : 1,
|
|
|
|
|
"PE9:DFSDM1_CKOUT" : 6,
|
|
|
|
|
"PE9:EVENTOUT" : 15,
|
|
|
|
|
"PE9:FSMC_D6" : 12,
|
|
|
|
|
"PE9:FSMC_DA6" : 12,
|
|
|
|
|
"PE9:QUADSPI_BK2_IO2" : 10,
|
|
|
|
|
"PE9:TIM1_CH1" : 1,
|
|
|
|
|
"PF0:EVENTOUT" : 15,
|
|
|
|
|
"PF0:FSMC_A0" : 12,
|
|
|
|
|
"PF0:I2C2_SDA" : 4,
|
|
|
|
|
"PF10:EVENTOUT" : 15,
|
|
|
|
|
"PF10:TIM1_ETR" : 1,
|
|
|
|
|
"PF10:TIM5_CH4" : 2,
|
|
|
|
|
"PF11:EVENTOUT" : 15,
|
|
|
|
|
"PF11:TIM8_ETR" : 3,
|
|
|
|
|
"PF12:EVENTOUT" : 15,
|
|
|
|
|
"PF12:FSMC_A6" : 12,
|
|
|
|
|
"PF12:TIM8_BKIN" : 3,
|
|
|
|
|
"PF13:EVENTOUT" : 15,
|
|
|
|
|
"PF13:FSMC_A7" : 12,
|
|
|
|
|
"PF13:I2CFMP1_SMBA" : 4,
|
|
|
|
|
"PF14:EVENTOUT" : 15,
|
|
|
|
|
"PF14:FSMC_A8" : 12,
|
|
|
|
|
"PF14:I2CFMP1_SCL" : 4,
|
|
|
|
|
"PF15:EVENTOUT" : 15,
|
|
|
|
|
"PF15:FSMC_A9" : 12,
|
|
|
|
|
"PF15:I2CFMP1_SDA" : 4,
|
|
|
|
|
"PF1:EVENTOUT" : 15,
|
|
|
|
|
"PF1:FSMC_A1" : 12,
|
|
|
|
|
"PF1:I2C2_SCL" : 4,
|
|
|
|
|
"PF2:EVENTOUT" : 15,
|
|
|
|
|
"PF2:FSMC_A2" : 12,
|
|
|
|
|
"PF2:I2C2_SMBA" : 4,
|
|
|
|
|
"PF3:EVENTOUT" : 15,
|
|
|
|
|
"PF3:FSMC_A3" : 12,
|
|
|
|
|
"PF3:TIM5_CH1" : 2,
|
|
|
|
|
"PF4:EVENTOUT" : 15,
|
|
|
|
|
"PF4:FSMC_A4" : 12,
|
|
|
|
|
"PF4:TIM5_CH2" : 2,
|
|
|
|
|
"PF5:EVENTOUT" : 15,
|
|
|
|
|
"PF5:FSMC_A5" : 12,
|
|
|
|
|
"PF5:TIM5_CH3" : 2,
|
|
|
|
|
"PF6:EVENTOUT" : 15,
|
|
|
|
|
"PF6:QUADSPI_BK1_IO3" : 9,
|
|
|
|
|
"PF6:TIM10_CH1" : 3,
|
|
|
|
|
"PF6:TRACED0" : 0,
|
|
|
|
|
"PF7:EVENTOUT" : 15,
|
|
|
|
|
"PF7:QUADSPI_BK1_IO2" : 9,
|
|
|
|
|
"PF7:TIM11_CH1" : 3,
|
|
|
|
|
"PF7:TRACED1" : 0,
|
|
|
|
|
"PF8:EVENTOUT" : 15,
|
|
|
|
|
"PF8:QUADSPI_BK1_IO0" : 10,
|
|
|
|
|
"PF8:TIM13_CH1" : 9,
|
|
|
|
|
"PF9:EVENTOUT" : 15,
|
|
|
|
|
"PF9:QUADSPI_BK1_IO1" : 10,
|
|
|
|
|
"PF9:TIM14_CH1" : 9,
|
|
|
|
|
"PG0:CAN1_RX" : 9,
|
|
|
|
|
"PG0:EVENTOUT" : 15,
|
|
|
|
|
"PG0:FSMC_A10" : 12,
|
|
|
|
|
"PG10:EVENTOUT" : 15,
|
|
|
|
|
"PG10:FSMC_NE3" : 12,
|
|
|
|
|
"PG11:CAN2_RX" : 9,
|
|
|
|
|
"PG11:EVENTOUT" : 15,
|
|
|
|
|
"PG12:CAN2_TX" : 9,
|
|
|
|
|
"PG12:EVENTOUT" : 15,
|
|
|
|
|
"PG12:FSMC_NE4" : 12,
|
|
|
|
|
"PG12:USART6_RTS" : 8,
|
|
|
|
|
"PG13:EVENTOUT" : 15,
|
|
|
|
|
"PG13:FSMC_A24" : 12,
|
|
|
|
|
"PG13:TRACED2" : 0,
|
|
|
|
|
"PG13:USART6_CTS" : 8,
|
|
|
|
|
"PG14:EVENTOUT" : 15,
|
|
|
|
|
"PG14:FSMC_A25" : 12,
|
|
|
|
|
"PG14:QUADSPI_BK2_IO3" : 9,
|
|
|
|
|
"PG14:TRACED3" : 0,
|
|
|
|
|
"PG14:USART6_TX" : 8,
|
|
|
|
|
"PG15:EVENTOUT" : 15,
|
|
|
|
|
"PG15:USART6_CTS" : 8,
|
|
|
|
|
"PG1:CAN1_TX" : 9,
|
|
|
|
|
"PG1:EVENTOUT" : 15,
|
|
|
|
|
"PG1:FSMC_A11" : 12,
|
|
|
|
|
"PG2:EVENTOUT" : 15,
|
|
|
|
|
"PG2:FSMC_A12" : 12,
|
|
|
|
|
"PG3:EVENTOUT" : 15,
|
|
|
|
|
"PG3:FSMC_A13" : 12,
|
|
|
|
|
"PG4:EVENTOUT" : 15,
|
|
|
|
|
"PG4:FSMC_A14" : 12,
|
|
|
|
|
"PG5:EVENTOUT" : 15,
|
|
|
|
|
"PG5:FSMC_A15" : 12,
|
|
|
|
|
"PG6:EVENTOUT" : 15,
|
|
|
|
|
"PG6:QUADSPI_BK1_NCS" : 10,
|
|
|
|
|
"PG7:EVENTOUT" : 15,
|
|
|
|
|
"PG7:USART6_CK" : 8,
|
|
|
|
|
"PG8:EVENTOUT" : 15,
|
|
|
|
|
"PG8:USART6_RTS" : 8,
|
|
|
|
|
"PG9:EVENTOUT" : 15,
|
|
|
|
|
"PG9:FSMC_NE2" : 12,
|
|
|
|
|
"PG9:QUADSPI_BK2_IO2" : 9,
|
|
|
|
|
"PG9:USART6_RX" : 8,
|
|
|
|
|
"PH0:EVENTOUT" : 15,
|
|
|
|
|
"PH1:EVENTOUT" : 15,
|
|
|
|
|
}
|
2018-01-07 21:12:07 -04:00
|
|
|
ADC1_map = {
|
|
|
|
|
# format is PIN : ADC1_CHAN
|
|
|
|
|
# extracted from tabula-addfunc-F412RG.csv
|
|
|
|
|
"PA0" : 0,
|
|
|
|
|
"PA1" : 1,
|
|
|
|
|
"PA2" : 2,
|
|
|
|
|
"PA3" : 3,
|
|
|
|
|
"PA4" : 4,
|
|
|
|
|
"PA5" : 5,
|
|
|
|
|
"PA6" : 6,
|
|
|
|
|
"PA7" : 7,
|
|
|
|
|
"PB0" : 8,
|
|
|
|
|
"PB1" : 9,
|
|
|
|
|
"PC0" : 10,
|
|
|
|
|
"PC1" : 11,
|
|
|
|
|
"PC2" : 12,
|
|
|
|
|
"PC3" : 13,
|
|
|
|
|
"PC4" : 14,
|
|
|
|
|
"PC5" : 15,
|
|
|
|
|
}
|
