2018-01-05 02:19:51 -04:00
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# hw definition file for processing by chibios_pins.py
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# new F412 layout
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MCU STM32F4xx STM32F412Rx
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# board ID for firmware load
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APJ_BOARD_ID 9
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# crystal frequency
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OSCILLATOR_HZ 24000000
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2018-01-12 00:43:06 -04:00
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STM32_HSE_ENABLED FALSE
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STM32_PLLM_VALUE 16
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STM32_PLLN_VALUE 384
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STM32_PLLP_VALUE 4
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STM32_PLLQ_VALUE 8
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STM32_PLLSRC STM32_PLLSRC_HSI
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STM32_PREE1 STM32_PREE1_DIV2
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STM32_PREE2 STM32_PREE2_DIV1
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STM32_PWM_USE_TIM3 TRUE
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2018-01-05 02:19:51 -04:00
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# board voltage
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STM32_VDD 330U
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2018-01-15 18:17:34 -04:00
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RAM_SIZE_KB 256
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2018-01-12 17:33:58 -04:00
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# flash size
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FLASH_SIZE_KB 1024
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2018-01-05 02:19:51 -04:00
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# serial port for stdout
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STDOUT_SERIAL SD1
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STDOUT_BAUDRATE 115200
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2018-01-11 21:01:06 -04:00
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# order of I2C buses
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I2C_ORDER I2C2 I2C1
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# order of UARTs
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UART_ORDER USART1 USART6 USART2
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2018-01-13 06:23:58 -04:00
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PC0 MGND ADC1
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2018-01-05 02:19:51 -04:00
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PC1 PWM4_SENSE ADC1
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PC2 PWM2_SENSE ADC1
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PC3 PWM1_SENSE ADC1
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PA0 PWM3_SENSE ADC1
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# USART2 is for sonix
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PA2 USART2_TX USART2
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PA3 USART2_RX USART2
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# SPI1 is radio
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2018-01-11 22:27:25 -04:00
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PA4 RADIO_CS CS
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2018-01-05 02:19:51 -04:00
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PA5 SPI1_SCK SPI1
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PA6 SPI1_MISO SPI1
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PA7 SPI1_MOSI SPI1
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PC4 RADIO_CE OUTPUT
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PC5 RADIO_PA_CTL OUTPUT
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PB0 RADIO_IRQ INPUT
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2018-01-13 06:23:58 -04:00
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PB1 BATT_MON ADC1 SCALE(11)
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2018-01-05 02:19:51 -04:00
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PB2 BOOT1 INPUT
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PB10 I2C2_SCL I2C2
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PA13 JTMS-SWDIO SWD
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PA14 JTCK-SWCLK SWD
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PB9 I2C1_SDA I2C1
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PB8 I2C1_SCL I2C1
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2018-01-13 06:23:58 -04:00
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PB7 LEDF OUTPUT HIGH GPIO(0)
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PB6 LEDR OUTPUT HIGH GPIO(1)
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2018-01-15 18:24:13 -04:00
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PB5 TIM3_CH2 TIM3 PWM(2)
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2018-01-05 02:19:51 -04:00
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PB3 I2C2_SDA I2C2
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PD2 OF_MOTION INPUT
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# USART6 is for GPS
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PA11 USART6_TX USART6
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PC7 USART6_RX USART6
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# USART1 is for debug console
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PA10 USART1_RX USART1
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PA9 USART1_TX USART1
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PA8 OF_MOTION INPUT
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2018-01-15 18:24:13 -04:00
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PC9 TIM3_CH4 TIM3 PWM(4)
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PC8 TIM3_CH3 TIM3 PWM(3)
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PC6 TIM3_CH1 TIM3 PWM(1)
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2018-01-05 02:19:51 -04:00
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# SPI2 is optical flow
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PB15 SPI2_MOSI SPI2
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PB14 SPI2_MISO SPI2
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PB13 SPI2_SCK SPI2
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2018-01-11 22:27:25 -04:00
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PB12 FLOW_CS CS
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2018-01-11 21:01:06 -04:00
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# SPI Device table
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SPIDEV cypress SPI1 DEVID1 RADIO_CS MODE0 2*MHZ 2*MHZ
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2018-01-13 06:23:58 -04:00
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SPIDEV cc2500 SPI1 DEVID1 RADIO_CS MODE0 4*MHZ 4*MHZ
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2018-01-11 21:01:06 -04:00
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SPIDEV pixartflow SPI2 DEVID2 FLOW_CS MODE3 2*MHZ 2*MHZ
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2018-01-15 18:17:34 -04:00
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# reserve 16k for bootloader and 32k for storage
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FLASH_RESERVE_START_KB 48
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2018-01-14 04:00:47 -04:00
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define HAL_CHIBIOS_ARCH_F412 1
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define HAL_INS_DEFAULT HAL_INS_MPU60XX_I2C
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define HAL_INS_DEFAULT_ROTATION ROTATION_NONE
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define HAL_INS_MPU60x0_I2C_BUS 1
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define HAL_INS_MPU60x0_I2C_ADDR 0x68
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define HAL_GPIO_RADIO_RESET 1
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define HAL_GPIO_RADIO_IRQ 2
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define HAL_RCINPUT_WITH_AP_RADIO 1
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define STORAGE_FLASH_PAGE 1
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2018-01-15 18:17:34 -04:00
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define HAL_STORAGE_SIZE 16384
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2018-01-14 04:00:47 -04:00
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