ardupilot/libraries/AP_HAL_SITL/RCOutput.cpp

83 lines
1.7 KiB
C++
Raw Normal View History

#include <AP_HAL/AP_HAL.h>
#if CONFIG_HAL_BOARD == HAL_BOARD_SITL
2012-12-17 23:56:21 -04:00
#include "RCOutput.h"
#define ENABLE_DEBUG 0
#if ENABLE_DEBUG
# include <stdio.h>
# define Debug(fmt, args ...) do {::printf("%s:%d: " fmt "\n", __FUNCTION__, __LINE__, ## args); } while (0)
#else
# define Debug(fmt, args ...)
#endif
2012-12-17 23:56:21 -04:00
using namespace HALSITL;
2012-12-17 23:56:21 -04:00
void RCOutput::init() {}
2012-12-17 23:56:21 -04:00
void RCOutput::set_freq(uint32_t chmask, uint16_t freq_hz)
{
Debug("set_freq(0x%04x, %u)\n", static_cast<uint32_t>(chmask), static_cast<uint32_t>(freq_hz));
2012-12-17 23:56:21 -04:00
_freq_hz = freq_hz;
}
uint16_t RCOutput::get_freq(uint8_t ch)
{
2012-12-17 23:56:21 -04:00
return _freq_hz;
}
void RCOutput::enable_ch(uint8_t ch)
{
if (!(_enable_mask & (1U << ch))) {
Debug("enable_ch(%u)\n", ch);
}
_enable_mask |= 1U << ch;
}
2012-12-17 23:56:21 -04:00
void RCOutput::disable_ch(uint8_t ch)
{
if (_enable_mask & (1U << ch)) {
Debug("disable_ch(%u)\n", ch);
}
_enable_mask &= ~1U << ch;
}
2012-12-17 23:56:21 -04:00
void RCOutput::write(uint8_t ch, uint16_t period_us)
2012-12-17 23:56:21 -04:00
{
if (ch < SITL_NUM_CHANNELS && (_enable_mask & (1U<<ch))) {
2016-10-11 08:02:04 -03:00
if (_corked) {
_pending[ch] = period_us;
} else {
_sitlState->pwm_output[ch] = period_us;
}
}
2012-12-17 23:56:21 -04:00
}
uint16_t RCOutput::read(uint8_t ch)
{
2015-06-29 19:55:02 -03:00
if (ch < SITL_NUM_CHANNELS) {
return _sitlState->pwm_output[ch];
}
return 0;
2012-12-17 23:56:21 -04:00
}
void RCOutput::read(uint16_t* period_us, uint8_t len)
2012-12-17 23:56:21 -04:00
{
memcpy(period_us, _sitlState->pwm_output, len * sizeof(uint16_t));
2012-12-17 23:56:21 -04:00
}
2012-12-18 05:04:47 -04:00
2016-10-11 08:02:04 -03:00
void RCOutput::cork(void)
{
memcpy(_pending, _sitlState->pwm_output, SITL_NUM_CHANNELS * sizeof(uint16_t));
2016-10-11 08:02:04 -03:00
_corked = true;
}
void RCOutput::push(void)
{
memcpy(_sitlState->pwm_output, _pending, SITL_NUM_CHANNELS * sizeof(uint16_t));
2016-10-11 08:02:04 -03:00
_corked = false;
}
2012-12-18 05:04:47 -04:00
#endif