traverseda
/
cpython
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Merged revisions 78308 via svnmerge from 

svn+ssh://pythondev@svn.python.org/python/trunk

........
  r78308 | andrew.kuchling | 2010-02-22 10:13:17 -0500 (Mon, 22 Feb 2010) | 2 lines

  #6414: clarify description of processor endianness.
  Text by Alexey Shamrin; I changed 'DEC Alpha' to the more relevant 'Intel Itanium'.
........
This commit is contained in:
Andrew M. Kuchling 2010-02-22 15:15:21 +00:00
parent 68af50ba39
commit fbd9d2fb10
1 changed files with 5 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
Doc/library/struct.rst
View File

@ -184,9 +184,11 @@ following table:
If the first character is not one of these, ``'@'`` is assumed.
Native byte order is big-endian or little-endian, depending on the host system.
For example, Motorola and Sun processors are big-endian; Intel and DEC
processors are little-endian.
Native byte order is big-endian or little-endian, depending on the host
system. For example, Intel x86 and AMD64 (x86-64) are little-endian;
Motorola 68000 and PowerPC G5 are big-endian; ARM and Intel Itanium feature
switchable endianness (bi-endian). Use ``sys.byteorder`` to check the
endianness of your system.
Native size and alignment are determined using the C compiler's
``sizeof`` expression. This is always combined with native byte order.